regulator: tps51632: Fix setting ramp delay
According to the datasheet: SLEW Register(Address = 07h) b7 b6 b5 b4 b3 b2 b1 b0 48mV/us 42mV/us 36mV/us 30mV/us 24mV/us 18mV/us 12mV/us 6mV/us Current code does not set correct slew rate in some cases: e.g. Assume ramp_delay is 10000, current code sets slew register to 6mV/us. Fix the logic to set slew register. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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1 changed files with 6 additions and 3 deletions
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@ -94,11 +94,14 @@ static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
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int ramp_delay)
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int ramp_delay)
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{
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{
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struct tps51632_chip *tps = rdev_get_drvdata(rdev);
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struct tps51632_chip *tps = rdev_get_drvdata(rdev);
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int bit = ramp_delay/6000;
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int bit;
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int ret;
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int ret;
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if (bit)
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if (ramp_delay == 0)
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bit--;
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bit = 0;
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else
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bit = DIV_ROUND_UP(ramp_delay, 6000) - 1;
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ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
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ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
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if (ret < 0)
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if (ret < 0)
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dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
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dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
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