[media] omap3isp: Use external rate instead of vpcfg
Access pipe->external_rate instead of isp_ccdc.vpcfg.pixelclk. Also remove means to set the value for isp_ccdc_vpcfg.pixelclk. Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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ccddd916dc
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c6c01f97b1
5 changed files with 3 additions and 30 deletions
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@ -329,19 +329,6 @@ void omap3isp_configure_bridge(struct isp_device *isp,
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isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
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}
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/**
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* isp_set_pixel_clock - Configures the ISP pixel clock
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* @isp: OMAP3 ISP device
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* @pixelclk: Average pixel clock in Hz
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*
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* Set the average pixel clock required by the sensor. The ISP will use the
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* lowest possible memory bandwidth settings compatible with the clock.
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**/
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static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
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{
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isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
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}
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void omap3isp_hist_dma_done(struct isp_device *isp)
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{
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if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
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@ -2077,7 +2064,6 @@ static int __devinit isp_probe(struct platform_device *pdev)
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isp->autoidle = autoidle;
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isp->platform_cb.set_xclk = isp_set_xclk;
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isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
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mutex_init(&isp->isp_mutex);
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spin_lock_init(&isp->stat_lock);
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@ -129,7 +129,6 @@ struct isp_platform_callback {
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int (*csiphy_config)(struct isp_csiphy *phy,
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struct isp_csiphy_dphy_cfg *dphy,
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struct isp_csiphy_lanes_cfg *lanes);
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void (*set_pixel_clock)(struct isp_device *isp, unsigned int pixelclk);
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};
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/*
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@ -839,8 +839,8 @@ static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
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if (pipe->input)
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div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
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else if (ccdc->vpcfg.pixelclk)
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div = l3_ick / ccdc->vpcfg.pixelclk;
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else if (pipe->external_rate)
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div = l3_ick / pipe->external_rate;
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div = clamp(div, 2U, max_div);
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fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
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@ -2433,8 +2433,6 @@ int omap3isp_ccdc_init(struct isp_device *isp)
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ccdc->clamp.oblen = 0;
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ccdc->clamp.dcsubval = 0;
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ccdc->vpcfg.pixelclk = 0;
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ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
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ccdc_apply_controls(ccdc);
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@ -80,14 +80,6 @@ struct ispccdc_syncif {
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u8 bt_r656_en;
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};
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/*
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* struct ispccdc_vp - Structure for Video Port parameters
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* @pixelclk: Input pixel clock in Hz
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*/
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struct ispccdc_vp {
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unsigned int pixelclk;
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};
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enum ispccdc_lsc_state {
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LSC_STATE_STOPPED = 0,
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LSC_STATE_STOPPING = 1,
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@ -162,7 +154,6 @@ struct ispccdc_lsc {
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* @update: Bitmask of controls to update during the next interrupt
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* @shadow_update: Controls update in progress by userspace
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* @syncif: Interface synchronization configuration
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* @vpcfg: Video port configuration
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* @underrun: A buffer underrun occurred and a new buffer has been queued
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* @state: Streaming state
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* @lock: Serializes shadow_update with interrupt handler
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@ -192,7 +183,6 @@ struct isp_ccdc_device {
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unsigned int shadow_update;
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struct ispccdc_syncif syncif;
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struct ispccdc_vp vpcfg;
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unsigned int underrun:1;
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enum isp_pipeline_stream_state state;
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@ -352,7 +352,7 @@ static int isp_video_validate_pipeline(struct isp_pipeline *pipe)
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unsigned int rate = UINT_MAX;
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omap3isp_ccdc_max_rate(&isp->isp_ccdc, &rate);
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if (isp->isp_ccdc.vpcfg.pixelclk > rate)
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if (pipe->external_rate > rate)
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return -ENOSPC;
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}
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