IB/hfi1: Document new sysfs entries for hfi1 driver
This patch adds description for the sdma engine related sysfs entries for the HFI1 driver. Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Reviewed-by: Sebastian Sanchez <sebastian.sanchez@intel.com> Reviewed-by: Jianxin Xiong <jianxin.xiong@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -89,6 +89,36 @@ HFI1
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nctxts - number of allowed contexts (PSM2)
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chip_reset - diagnostic (root only)
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boardversion - board version
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sdma<N>/ - one directory per sdma engine (0 - 15)
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sdma<N>/cpu_list - read-write, list of cpus for user-process to sdma
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engine assignment.
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sdma<N>/vl - read-only, vl the sdma engine maps to.
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The new interface will give the user control on the affinity settings
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for the hfi1 device.
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As an example, to set an sdma engine irq affinity and thread affinity
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of a user processes to use the sdma engine, which is "near" in terms
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of NUMA configuration, or physical cpu location, the user will do:
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echo "3" > /proc/irq/<N>/smp_affinity_list
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echo "4-7" > /sys/devices/.../sdma3/cpu_list
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cat /sys/devices/.../sdma3/vl
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0
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echo "8" > /proc/irq/<M>/smp_affinity_list
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echo "9-12" > /sys/devices/.../sdma4/cpu_list
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cat /sys/devices/.../sdma4/vl
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1
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to make sure that when a process runs on cpus 4,5,6, or 7,
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and uses vl=0, then sdma engine 3 is selected by the driver,
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and also the interrupt of the sdma engine 3 is steered to cpu 3.
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Similarly, when a process runs on cpus 9,10,11, or 12 and sets vl=1,
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then engine 4 will be selected and the irq of the sdma engine 4 is
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steered to cpu 8.
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This assumes that in the above N is the irq number of "sdma3",
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and M is irq number of "sdma4" in the /proc/interrupts file.
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ports/1/
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CCMgtA/
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cc_settings_bin - CCA tables used by PSM2
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