Input: ads7846 - pin change interrupt support
Some SoCs support only pin change interrupts on GPIO pins used as irq lines. The ads7846 core is not affected from the additional irqs on the rising edge because the code accounts touch bounce anyway by kicking in a timer and disabling the irq after the first request and reenabling the irq after a timeout when there is no longer pen down detected. Signed-off-by: Michael Roth <mroth@nessie.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
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1 changed files with 9 additions and 3 deletions
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@ -1150,10 +1150,16 @@ static int __devinit ads7846_probe(struct spi_device *spi)
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if (request_irq(spi->irq, ads7846_irq, IRQF_TRIGGER_FALLING,
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spi->dev.driver->name, ts)) {
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dev_info(&spi->dev,
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"trying pin change workaround on irq %d\n", spi->irq);
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err = request_irq(spi->irq, ads7846_irq,
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IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
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spi->dev.driver->name, ts);
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if (err) {
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dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
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err = -EBUSY;
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goto err_free_gpio;
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}
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}
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err = ads784x_hwmon_register(spi, ts);
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if (err)
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