[ARM] MV78xx0: Support for Buffalo WXL (Terastation Duo)
* Modification of Kconfig to add the Option * 1 new file : buffalo-wxl-setup.c This file is inspired from the db-78xx0-setup.c already present. The following is done: - Configure MPP Lines for the plateform (see my patch for MPP) This is taken from the stock kernel provided by buffalotech (the vendor) - GigaBit Ethernet - Sata - Uart are initiallized in a different way than on the dev board as we have one core only. - USB The kernel has been running for some days now on my plateform. Signed-off-by: Sebastien Requiem <sebastien@kolios.dk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
This commit is contained in:
Sebastien Requiem
Nicolas Pitre
parent
ee40ceab23
commit
c499546f43
4 changed files with 163 additions and 0 deletions
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@ -176,6 +176,7 @@ CONFIG_ARCH_MV78XX0=y
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#
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CONFIG_MACH_DB78X00_BP=y
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CONFIG_MACH_RD78X00_MASA=y
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CONFIG_MACH_TERASTATION_WXL=y
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CONFIG_PLAT_ORION=y
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#
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@ -14,6 +14,12 @@ config MACH_RD78X00_MASA
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Say 'Y' here if you want your kernel to support the
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Marvell RD-78x00-mASA Reference Design.
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config MACH_TERASTATION_WXL
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bool "Buffalo WLX (Terastation Duo) NAS"
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help
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Say 'Y' here if you want your kernel to support the
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Buffalo WXL Nas.
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endmenu
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endif
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@ -1,3 +1,4 @@
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obj-y += common.o addr-map.o mpp.o irq.o pcie.o
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obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o
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obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
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obj-$(CONFIG_MACH_TERASTATION_WXL) += buffalo-wxl-setup.o
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155
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
Normal file
155
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
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@ -0,0 +1,155 @@
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/*
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* arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
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*
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* Buffalo WXL (Terastation Duo) Setup routines
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*
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* sebastien requiem <sebastien@requiem.fr>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/ata_platform.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/ethtool.h>
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#include <linux/i2c.h>
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#include <mach/mv78xx0.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#include "mpp.h"
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/* This arch has 2 Giga Ethernet */
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static struct mv643xx_eth_platform_data db78x00_ge00_data = {
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.phy_addr = MV643XX_ETH_PHY_ADDR(0),
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};
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static struct mv643xx_eth_platform_data db78x00_ge01_data = {
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.phy_addr = MV643XX_ETH_PHY_ADDR(8),
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};
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/* 2 SATA controller supporting HotPlug */
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static struct mv_sata_platform_data db78x00_sata_data = {
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.n_ports = 2,
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};
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static struct i2c_board_info __initdata db78x00_i2c_rtc = {
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I2C_BOARD_INFO("ds1338", 0x68),
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};
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static unsigned int wxl_mpp_config[] __initdata = {
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MPP0_GE1_TXCLK,
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MPP1_GE1_TXCTL,
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MPP2_GE1_RXCTL,
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MPP3_GE1_RXCLK,
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MPP4_GE1_TXD0,
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MPP5_GE1_TXD1,
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MPP6_GE1_TXD2,
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MPP7_GE1_TXD3,
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MPP8_GE1_RXD0,
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MPP9_GE1_RXD1,
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MPP10_GE1_RXD2,
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MPP11_GE1_RXD3,
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MPP12_GPIO,
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MPP13_SYSRST_OUTn,
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MPP14_SATA1_ACTn,
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MPP15_SATA0_ACTn,
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MPP16_GPIO,
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MPP17_GPIO,
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MPP18_GPIO,
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MPP19_GPIO,
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MPP20_GPIO,
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MPP21_GPIO,
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MPP22_GPIO,
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MPP23_GPIO,
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MPP24_UA2_TXD,
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MPP25_UA2_RXD,
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MPP26_UA2_CTSn,
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MPP27_UA2_RTSn,
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MPP28_GPIO,
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MPP29_SYSRST_OUTn,
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MPP30_GPIO,
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MPP31_GPIO,
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MPP32_GPIO,
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MPP33_GPIO,
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MPP34_GPIO,
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MPP35_GPIO,
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MPP36_GPIO,
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MPP37_GPIO,
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MPP38_GPIO,
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MPP39_GPIO,
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MPP40_UNUSED,
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MPP41_UNUSED,
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MPP42_UNUSED,
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MPP43_UNUSED,
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MPP44_UNUSED,
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MPP45_UNUSED,
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MPP46_UNUSED,
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MPP47_UNUSED,
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MPP48_SATA1_ACTn,
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MPP49_SATA0_ACTn,
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0
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};
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static void __init wxl_init(void)
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{
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/*
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* Basic MV78xx0 setup. Needs to be called early.
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*/
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mv78xx0_init();
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mv78xx0_mpp_conf(wxl_mpp_config);
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/*
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* Partition on-chip peripherals between the two CPU cores.
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*/
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mv78xx0_ehci0_init();
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mv78xx0_ehci1_init();
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mv78xx0_ehci2_init();
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mv78xx0_ge00_init(&db78x00_ge00_data);
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mv78xx0_ge01_init(&db78x00_ge01_data);
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mv78xx0_sata_init(&db78x00_sata_data);
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mv78xx0_uart0_init();
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mv78xx0_uart1_init();
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mv78xx0_uart2_init();
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mv78xx0_uart3_init();
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mv78xx0_i2c_init();
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i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
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}
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static int __init wxl_pci_init(void)
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{
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if (machine_is_terastation_wxl()) {
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/*
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* Assign the x16 PCIe slot on the board to CPU core
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* #0, and let CPU core #1 have the four x1 slots.
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*/
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if (mv78xx0_core_index() == 0)
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mv78xx0_pcie_init(0, 1);
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else
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mv78xx0_pcie_init(1, 0);
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}
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return 0;
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}
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subsys_initcall(wxl_pci_init);
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MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
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/* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */
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.phys_io = MV78XX0_REGS_PHYS_BASE,
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.io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
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.boot_params = 0x00000100,
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.init_machine = wxl_init,
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.map_io = mv78xx0_map_io,
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.init_irq = mv78xx0_init_irq,
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.timer = &mv78xx0_timer,
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MACHINE_END
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