dl2k: Add support for IP1000A-based cards
Add support for IP1000A chips to dl2k driver. IP1000A chip looks like a TC9020 with integrated PHY. This allows IP1000A chips to work reliably because the ipg driver is buggy - it loses packets under load and then completely stops transmitting data. Tested with Asus NX1101 v2.0 at 10, 100 and 1000Mbps: vendor=0x13f0 device=0x1023 (rev 0x41) subsystem vendor=0x1043 device=0x8180 MAC address registers access needed to be changed from 8-bit to 16-bit because 8-bit does not work on IP1000A. 8-bit access is not even allowed in the TC9020 datasheet (although it worked). 16-bit access works on both. Tested that it does not break D-Link DGE-550T (DL-2000 chip, probably a rebranded TC9020): vendor=0x1186 device=0x4000 (rev 0x0c) subsystem vendor=0x1186 device=0x4000 Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ondrej Zary
David S. Miller
parent
41033f029e
commit
c3f45d322c
3 changed files with 69 additions and 6 deletions
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@ -17,15 +17,16 @@ config NET_VENDOR_DLINK
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if NET_VENDOR_DLINK
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config DL2K
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tristate "DL2000/TC902x-based Gigabit Ethernet support"
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tristate "DL2000/TC902x/IP1000A-based Gigabit Ethernet support"
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depends on PCI
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select CRC32
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---help---
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This driver supports DL2000/TC902x-based Gigabit ethernet cards,
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This driver supports DL2000/TC902x/IP1000A-based Gigabit ethernet cards,
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which includes
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D-Link DGE-550T Gigabit Ethernet Adapter.
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D-Link DL2000-based Gigabit Ethernet Adapter.
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Sundance/Tamarack TC902x Gigabit Ethernet Adapter.
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ICPlus IP1000A-based cards
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To compile this driver as a module, choose M here: the
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module will be called dl2k.
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@ -253,6 +253,19 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
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if (err)
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goto err_out_unmap_rx;
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if (np->chip_id == CHIP_IP1000A &&
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(np->pdev->revision == 0x40 || np->pdev->revision == 0x41)) {
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/* PHY magic taken from ipg driver, undocumented registers */
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mii_write(dev, np->phy_addr, 31, 0x0001);
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mii_write(dev, np->phy_addr, 27, 0x01e0);
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mii_write(dev, np->phy_addr, 31, 0x0002);
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mii_write(dev, np->phy_addr, 27, 0xeb8e);
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mii_write(dev, np->phy_addr, 31, 0x0000);
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mii_write(dev, np->phy_addr, 30, 0x005e);
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/* advertise 1000BASE-T half & full duplex, prefer MASTER */
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mii_write(dev, np->phy_addr, MII_CTRL1000, 0x0700);
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}
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/* Fiber device? */
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np->phy_media = (dr16(ASICCtrl) & PhyMedia) ? 1 : 0;
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np->link_status = 0;
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@ -361,6 +374,11 @@ parse_eeprom (struct net_device *dev)
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for (i = 0; i < 6; i++)
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dev->dev_addr[i] = psrom->mac_addr[i];
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if (np->chip_id == CHIP_IP1000A) {
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np->led_mode = psrom->led_mode;
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return 0;
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}
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if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) {
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return 0;
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}
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@ -406,6 +424,28 @@ parse_eeprom (struct net_device *dev)
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return 0;
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}
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static void rio_set_led_mode(struct net_device *dev)
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{
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struct netdev_private *np = netdev_priv(dev);
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void __iomem *ioaddr = np->ioaddr;
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u32 mode;
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if (np->chip_id != CHIP_IP1000A)
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return;
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mode = dr32(ASICCtrl);
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mode &= ~(IPG_AC_LED_MODE_BIT_1 | IPG_AC_LED_MODE | IPG_AC_LED_SPEED);
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if (np->led_mode & 0x01)
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mode |= IPG_AC_LED_MODE;
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if (np->led_mode & 0x02)
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mode |= IPG_AC_LED_MODE_BIT_1;
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if (np->led_mode & 0x08)
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mode |= IPG_AC_LED_SPEED;
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dw32(ASICCtrl, mode);
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}
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static int
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rio_open (struct net_device *dev)
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{
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@ -424,6 +464,8 @@ rio_open (struct net_device *dev)
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GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset);
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mdelay(10);
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rio_set_led_mode(dev);
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/* DebugCtrl bit 4, 5, 9 must set */
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dw32(DebugCtrl, dr32(DebugCtrl) | 0x0230);
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@ -433,9 +475,13 @@ rio_open (struct net_device *dev)
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alloc_list (dev);
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/* Get station address */
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for (i = 0; i < 6; i++)
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dw8(StationAddr0 + i, dev->dev_addr[i]);
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/* Set station address */
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/* 16 or 32-bit access is required by TC9020 datasheet but 8-bit works
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* too. However, it doesn't work on IP1000A so we use 16-bit access.
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*/
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for (i = 0; i < 3; i++)
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dw16(StationAddr0 + 2 * i,
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cpu_to_le16(((u16 *)dev->dev_addr)[i]));
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set_multicast (dev);
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if (np->coalesce) {
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@ -780,6 +826,7 @@ tx_error (struct net_device *dev, int tx_status)
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break;
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mdelay (1);
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}
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rio_set_led_mode(dev);
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rio_free_tx (dev, 1);
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/* Reset TFDListPtr */
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dw32(TFDListPtr0, np->tx_ring_dma +
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@ -799,6 +846,7 @@ tx_error (struct net_device *dev, int tx_status)
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break;
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mdelay (1);
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}
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rio_set_led_mode(dev);
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/* Let TxStartThresh stay default value */
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}
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/* Maximum Collisions */
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@ -965,6 +1013,7 @@ rio_error (struct net_device *dev, int int_status)
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dev->name, int_status);
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dw16(ASICCtrl + 2, GlobalReset | HostReset);
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mdelay (500);
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rio_set_led_mode(dev);
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}
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}
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@ -211,6 +211,10 @@ enum ASICCtrl_HiWord_bits {
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ResetBusy = 0x0400,
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};
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#define IPG_AC_LED_MODE BIT(14)
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#define IPG_AC_LED_SPEED BIT(27)
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#define IPG_AC_LED_MODE_BIT_1 BIT(29)
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/* Transmit Frame Control bits */
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enum TFC_bits {
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DwordAlign = 0x00000000,
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@ -332,7 +336,10 @@ typedef struct t_SROM {
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u16 asic_ctrl; /* 0x02 */
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u16 sub_vendor_id; /* 0x04 */
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u16 sub_system_id; /* 0x06 */
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u16 reserved1[12]; /* 0x08-0x1f */
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u16 pci_base_1; /* 0x08 (IP1000A only) */
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u16 pci_base_2; /* 0x0a (IP1000A only) */
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u16 led_mode; /* 0x0c (IP1000A only) */
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u16 reserved1[9]; /* 0x0e-0x1f */
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u8 mac_addr[6]; /* 0x20-0x25 */
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u8 reserved2[10]; /* 0x26-0x2f */
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u8 sib[204]; /* 0x30-0xfb */
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@ -397,6 +404,7 @@ struct netdev_private {
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u16 advertising; /* NWay media advertisement */
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u16 negotiate; /* Negotiated media */
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int phy_addr; /* PHY addresses. */
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u16 led_mode; /* LED mode read from EEPROM (IP1000A only) */
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};
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/* The station address location in the EEPROM. */
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@ -407,10 +415,15 @@ struct netdev_private {
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class_mask of the class are honored during the comparison.
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driver_data Data private to the driver.
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*/
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#define CHIP_IP1000A 1
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static const struct pci_device_id rio_pci_tbl[] = {
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{0x1186, 0x4000, PCI_ANY_ID, PCI_ANY_ID, },
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{0x13f0, 0x1021, PCI_ANY_ID, PCI_ANY_ID, },
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{ PCI_VDEVICE(SUNDANCE, 0x1023), CHIP_IP1000A },
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{ PCI_VDEVICE(SUNDANCE, 0x2021), CHIP_IP1000A },
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{ PCI_VDEVICE(DLINK, 0x9021), CHIP_IP1000A },
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{ PCI_VDEVICE(DLINK, 0x4020), CHIP_IP1000A },
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{ }
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};
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MODULE_DEVICE_TABLE (pci, rio_pci_tbl);
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