ixgbe: add WOL support for X540
Add support for WOL as determined by the EEPROM. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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ff9d1a5aef
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c23f5b6bbb
4 changed files with 30 additions and 2 deletions
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@ -491,6 +491,7 @@ struct ixgbe_adapter {
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u64 rsc_total_flush;
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u32 wol;
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u16 eeprom_version;
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u16 eeprom_cap;
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int node;
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u32 led_reg;
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@ -1888,6 +1888,7 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
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{
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struct ixgbe_hw *hw = &adapter->hw;
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int retval = 1;
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u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
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/* WOL not supported except for the following */
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switch(hw->device_id) {
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@ -1911,6 +1912,18 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
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case IXGBE_DEV_ID_82599_KX4:
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retval = 0;
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break;
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case IXGBE_DEV_ID_X540T:
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/* check eeprom to see if enabled wol */
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if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
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((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
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(hw->bus.func == 0))) {
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retval = 0;
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break;
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}
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/* All others not supported */
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wol->supported = 0;
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break;
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default:
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wol->supported = 0;
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}
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@ -7074,6 +7074,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
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u16 device_caps;
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#endif
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u32 eec;
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u16 wol_cap;
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/* Catch broken hardware that put the wrong VF device ID in
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* the PCIe SR-IOV capability.
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@ -7338,6 +7339,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
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netdev->features &= ~NETIF_F_RXHASH;
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}
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/* WOL not supported for all but the following */
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adapter->wol = 0;
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switch (pdev->device) {
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case IXGBE_DEV_ID_82599_SFP:
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/* Only this subdevice supports WOL */
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@ -7352,8 +7355,15 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
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case IXGBE_DEV_ID_82599_KX4:
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adapter->wol = IXGBE_WUFC_MAG;
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break;
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default:
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adapter->wol = 0;
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case IXGBE_DEV_ID_X540T:
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/* Check eeprom to see if it is enabled */
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hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
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wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
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if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
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((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
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(hw->bus.func == 0)))
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adapter->wol = IXGBE_WUFC_MAG;
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break;
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}
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device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
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@ -1754,6 +1754,10 @@ enum {
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#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_SANMAC 0x0 /* Alt. SAN MAC exists */
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#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN 0x1 /* Alt. WWN base exists */
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#define IXGBE_DEVICE_CAPS_WOL_PORT0_1 0x4 /* WoL supported on ports 0 & 1 */
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#define IXGBE_DEVICE_CAPS_WOL_PORT0 0x8 /* WoL supported on port 0 */
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#define IXGBE_DEVICE_CAPS_WOL_MASK 0xC /* Mask for WoL capabilities */
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/* PCI Bus Info */
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#define IXGBE_PCI_DEVICE_STATUS 0xAA
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#define IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING 0x0020
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