drm/radeon/kms: improve 6xx/7xx CS error output
Makes debugging CS rejections much easier. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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fff1ce4dc6
commit
c2049b3d29
1 changed files with 26 additions and 20 deletions
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@ -295,17 +295,18 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
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}
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if (!IS_ALIGNED(pitch, pitch_align)) {
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dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
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__func__, __LINE__, pitch);
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dev_warn(p->dev, "%s:%d cb pitch (%d, 0x%x, %d) invalid\n",
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__func__, __LINE__, pitch, pitch_align, array_mode);
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return -EINVAL;
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}
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if (!IS_ALIGNED(height, height_align)) {
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dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
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__func__, __LINE__, height);
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dev_warn(p->dev, "%s:%d cb height (%d, 0x%x, %d) invalid\n",
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__func__, __LINE__, height, height_align, array_mode);
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return -EINVAL;
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}
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if (!IS_ALIGNED(base_offset, base_align)) {
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dev_warn(p->dev, "%s offset[%d] 0x%llx not aligned\n", __func__, i, base_offset);
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dev_warn(p->dev, "%s offset[%d] 0x%llx 0x%llx, %d not aligned\n", __func__, i,
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base_offset, base_align, array_mode);
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return -EINVAL;
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}
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@ -320,7 +321,10 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
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* broken userspace.
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*/
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} else {
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dev_warn(p->dev, "%s offset[%d] %d %d %lu too big\n", __func__, i, track->cb_color_bo_offset[i], tmp, radeon_bo_size(track->cb_color_bo[i]));
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dev_warn(p->dev, "%s offset[%d] %d %d %d %lu too big\n", __func__, i,
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array_mode,
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track->cb_color_bo_offset[i], tmp,
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radeon_bo_size(track->cb_color_bo[i]));
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return -EINVAL;
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}
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}
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@ -455,17 +459,18 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
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}
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if (!IS_ALIGNED(pitch, pitch_align)) {
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dev_warn(p->dev, "%s:%d db pitch (%d) invalid\n",
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__func__, __LINE__, pitch);
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dev_warn(p->dev, "%s:%d db pitch (%d, 0x%x, %d) invalid\n",
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__func__, __LINE__, pitch, pitch_align, array_mode);
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return -EINVAL;
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}
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if (!IS_ALIGNED(height, height_align)) {
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dev_warn(p->dev, "%s:%d db height (%d) invalid\n",
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__func__, __LINE__, height);
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dev_warn(p->dev, "%s:%d db height (%d, 0x%x, %d) invalid\n",
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__func__, __LINE__, height, height_align, array_mode);
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return -EINVAL;
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}
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if (!IS_ALIGNED(base_offset, base_align)) {
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dev_warn(p->dev, "%s offset[%d] 0x%llx not aligned\n", __func__, i, base_offset);
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dev_warn(p->dev, "%s offset[%d] 0x%llx, 0x%llx, %d not aligned\n", __func__, i,
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base_offset, base_align, array_mode);
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return -EINVAL;
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}
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@ -473,7 +478,8 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
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nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1;
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tmp = ntiles * bpe * 64 * nviews;
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if ((tmp + track->db_offset) > radeon_bo_size(track->db_bo)) {
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dev_warn(p->dev, "z/stencil buffer too small (0x%08X %d %d %d -> %u have %lu)\n",
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dev_warn(p->dev, "z/stencil buffer (%d) too small (0x%08X %d %d %d -> %u have %lu)\n",
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array_mode,
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track->db_depth_size, ntiles, nviews, bpe, tmp + track->db_offset,
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radeon_bo_size(track->db_bo));
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return -EINVAL;
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@ -1227,18 +1233,18 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i
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/* XXX check height as well... */
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if (!IS_ALIGNED(pitch, pitch_align)) {
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dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n",
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__func__, __LINE__, pitch);
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dev_warn(p->dev, "%s:%d tex pitch (%d, 0x%x, %d) invalid\n",
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__func__, __LINE__, pitch, pitch_align, G_038000_TILE_MODE(word0));
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return -EINVAL;
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}
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if (!IS_ALIGNED(base_offset, base_align)) {
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dev_warn(p->dev, "%s:%d tex base offset (0x%llx) invalid\n",
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__func__, __LINE__, base_offset);
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dev_warn(p->dev, "%s:%d tex base offset (0x%llx, 0x%llx, %d) invalid\n",
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__func__, __LINE__, base_offset, base_align, G_038000_TILE_MODE(word0));
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return -EINVAL;
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}
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if (!IS_ALIGNED(mip_offset, base_align)) {
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dev_warn(p->dev, "%s:%d tex mip offset (0x%llx) invalid\n",
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__func__, __LINE__, mip_offset);
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dev_warn(p->dev, "%s:%d tex mip offset (0x%llx, 0x%llx, %d) invalid\n",
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__func__, __LINE__, mip_offset, base_align, G_038000_TILE_MODE(word0));
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return -EINVAL;
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}
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