From c1d7f41cfefc0977433b5ed65c6fb71df8ee046b Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 31 Jan 2012 18:19:04 +0100 Subject: [PATCH] MIPS: PNX833x: use IS_ENABLED() macro Signed-off-by: Florian Fainelli Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3332/ Signed-off-by: Ralf Baechle --- arch/mips/pnx833x/stb22x/board.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/pnx833x/stb22x/board.c b/arch/mips/pnx833x/stb22x/board.c index 644eb7c3210f..4b328ac43050 100644 --- a/arch/mips/pnx833x/stb22x/board.c +++ b/arch/mips/pnx833x/stb22x/board.c @@ -91,7 +91,7 @@ void __init pnx833x_board_setup(void) pnx833x_gpio_select_function_alt(32); pnx833x_gpio_select_function_alt(33); -#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) +#if IS_ENABLED(CONFIG_MTD_NAND_PLATFORM) /* Setup MIU for NAND access on CS0... * * (it seems that we must also configure CS1 for reliable operation, @@ -117,7 +117,7 @@ void __init pnx833x_board_setup(void) pnx833x_gpio_select_output(5); pnx833x_gpio_write(1, 5); -#elif defined(CONFIG_MTD_CFI) || defined(CONFIG_MTD_CFI_MODULE) +#elif IS_ENABLED(CONFIG_MTD_CFI) /* Set up MIU for 16-bit NOR access on CS0 and CS1... */