m68knommu: platform setup for 5407 ColdFire parts
Switch to platform style configuration for 5407 ColdFire parts. Initial support is for the UARTs. DMA support moved to common code for all ColdFire parts. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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1 changed files with 57 additions and 12 deletions
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@ -13,11 +13,11 @@
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#include <linux/param.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <asm/dma.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfdma.h>
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#include <asm/mcfuart.h>
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/***************************************************************************/
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/***************************************************************************/
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@ -29,17 +29,51 @@ extern unsigned int mcf_timerlevel;
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/***************************************************************************/
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/***************************************************************************/
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/*
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static struct mcf_platform_uart m5407_uart_platform[] = {
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* DMA channel base address table.
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{
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*/
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.mapbase = MCF_MBAR + MCFUART_BASE1,
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unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
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.irq = 73,
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MCF_MBAR + MCFDMA_BASE0,
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},
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MCF_MBAR + MCFDMA_BASE1,
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{
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MCF_MBAR + MCFDMA_BASE2,
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.mapbase = MCF_MBAR + MCFUART_BASE2,
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MCF_MBAR + MCFDMA_BASE3,
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.irq = 74,
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},
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{ },
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};
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};
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unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
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static struct platform_device m5407_uart = {
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.name = "mcfuart",
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.id = 0,
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.dev.platform_data = m5407_uart_platform,
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};
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static struct platform_device *m5407_devices[] __initdata = {
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&m5407_uart,
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};
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/***************************************************************************/
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static void __init m5407_uart_init_line(int line, int irq)
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{
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if (line == 0) {
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writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
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writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
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} else if (line == 1) {
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writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
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writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
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mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
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}
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}
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static void __init m5407_uarts_init(void)
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{
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const int nrlines = ARRAY_SIZE(m5407_uart_platform);
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int line;
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for (line = 0; (line < nrlines); line++)
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m5407_uart_init_line(line, m5407_uart_platform[line].irq);
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}
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/***************************************************************************/
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/***************************************************************************/
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@ -90,7 +124,7 @@ int mcf_timerirqpending(int timer)
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/***************************************************************************/
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/***************************************************************************/
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void config_BSP(char *commandp, int size)
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void __init config_BSP(char *commandp, int size)
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{
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{
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mcf_setimr(MCFSIM_IMR_MASKALL);
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mcf_setimr(MCFSIM_IMR_MASKALL);
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@ -105,3 +139,14 @@ void config_BSP(char *commandp, int size)
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}
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}
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/***************************************************************************/
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/***************************************************************************/
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static int __init init_BSP(void)
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{
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m5407_uarts_init();
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platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
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return 0;
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}
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arch_initcall(init_BSP);
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/***************************************************************************/
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