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More configcheck fixes.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2005-10-29 19:32:40 +01:00
parent 4ee1303a78
commit beb3ca82fc
3 changed files with 5 additions and 3 deletions
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2
include/asm-mips/mach-au1x00/au1xxx_psc.h
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@ -33,6 +33,8 @@
#ifndef _AU1000_PSC_H_ #ifndef _AU1000_PSC_H_
#define _AU1000_PSC_H_ #define _AU1000_PSC_H_
#include <linux/config.h>
/* The PSC base addresses. */ /* The PSC base addresses. */
#ifdef CONFIG_SOC_AU1550 #ifdef CONFIG_SOC_AU1550
#define PSC0_BASE_ADDR 0xb1a00000 #define PSC0_BASE_ADDR 0xb1a00000

1
include/asm-mips/mmzone.h
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@ -5,6 +5,7 @@
#ifndef _ASM_MMZONE_H_ #ifndef _ASM_MMZONE_H_
#define _ASM_MMZONE_H_ #define _ASM_MMZONE_H_
#include <linux/config.h>
#include <asm/page.h> #include <asm/page.h>
#include <mmzone.h> #include <mmzone.h>

5
include/asm-mips/spinlock.h
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@ -9,17 +9,16 @@
#ifndef _ASM_SPINLOCK_H #ifndef _ASM_SPINLOCK_H
#define _ASM_SPINLOCK_H #define _ASM_SPINLOCK_H
#include <linux/config.h>
#include <asm/war.h> #include <asm/war.h>
/* /*
* Your basic SMP spinlocks, allowing only a single CPU anywhere * Your basic SMP spinlocks, allowing only a single CPU anywhere
*/ */
#define __raw_spin_is_locked(x) ((x)->lock != 0) #define __raw_spin_is_locked(x) ((x)->lock != 0)
#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
#define __raw_spin_unlock_wait(x) \ #define __raw_spin_unlock_wait(x) \
do { cpu_relax(); } while ((x)->lock) do { cpu_relax(); } while ((x)->lock)
/* /*
* Simple spin lock operations. There are two variants, one clears IRQ's * Simple spin lock operations. There are two variants, one clears IRQ's