intel-gtt: kill mask_memory functions
That indirection mess can now go. Add a dummy i81x gtt_driver to avoid a NULL pointer check. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Daniel Vetter
Chris Wilson
parent
90cb149e1a
commit
bdd30729b6
1 changed files with 13 additions and 92 deletions
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@ -69,20 +69,6 @@ static struct gatt_mask intel_i810_masks[] =
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#define INTEL_AGP_CACHED_MEMORY_LLC_MLC 3
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#define INTEL_AGP_CACHED_MEMORY_LLC_MLC_GFDT 4
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static struct gatt_mask intel_gen6_masks[] =
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{
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{.mask = I810_PTE_VALID | GEN6_PTE_UNCACHED,
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.type = INTEL_AGP_UNCACHED_MEMORY },
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{.mask = I810_PTE_VALID | GEN6_PTE_LLC,
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.type = INTEL_AGP_CACHED_MEMORY_LLC },
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{.mask = I810_PTE_VALID | GEN6_PTE_LLC | GEN6_PTE_GFDT,
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.type = INTEL_AGP_CACHED_MEMORY_LLC_GFDT },
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{.mask = I810_PTE_VALID | GEN6_PTE_LLC_MLC,
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.type = INTEL_AGP_CACHED_MEMORY_LLC_MLC },
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{.mask = I810_PTE_VALID | GEN6_PTE_LLC_MLC | GEN6_PTE_GFDT,
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.type = INTEL_AGP_CACHED_MEMORY_LLC_MLC_GFDT },
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};
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struct intel_gtt_driver {
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unsigned int gen : 8;
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unsigned int is_g33 : 1;
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@ -287,34 +273,6 @@ static void i8xx_destroy_pages(struct page *page)
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atomic_dec(&agp_bridge->current_memory_agp);
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}
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static int intel_i830_type_to_mask_type(struct agp_bridge_data *bridge,
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int type)
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{
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if (type < AGP_USER_TYPES)
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return type;
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else if (type == AGP_USER_CACHED_MEMORY)
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return INTEL_AGP_CACHED_MEMORY;
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else
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return 0;
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}
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static int intel_gen6_type_to_mask_type(struct agp_bridge_data *bridge,
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int type)
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{
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unsigned int type_mask = type & ~AGP_USER_CACHED_MEMORY_GFDT;
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unsigned int gfdt = type & AGP_USER_CACHED_MEMORY_GFDT;
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if (type_mask == AGP_USER_UNCACHED_MEMORY)
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return INTEL_AGP_UNCACHED_MEMORY;
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else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
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return gfdt ? INTEL_AGP_CACHED_MEMORY_LLC_MLC_GFDT :
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INTEL_AGP_CACHED_MEMORY_LLC_MLC;
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else /* set 'normal'/'cached' to LLC by default */
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return gfdt ? INTEL_AGP_CACHED_MEMORY_LLC_GFDT :
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INTEL_AGP_CACHED_MEMORY_LLC;
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}
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static int intel_i810_insert_entries(struct agp_memory *mem, off_t pg_start,
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int type)
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{
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@ -1290,35 +1248,6 @@ static int i9xx_setup(void)
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return 0;
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}
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/*
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* The i965 supports 36-bit physical addresses, but to keep
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* the format of the GTT the same, the bits that don't fit
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* in a 32-bit word are shifted down to bits 4..7.
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*
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* Gcc is smart enough to notice that "(addr >> 28) & 0xf0"
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* is always zero on 32-bit architectures, so no need to make
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* this conditional.
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*/
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static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
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dma_addr_t addr, int type)
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{
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/* Shift high bits down */
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addr |= (addr >> 28) & 0xf0;
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/* Type checking must be done elsewhere */
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return addr | bridge->driver->masks[type].mask;
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}
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static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
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dma_addr_t addr, int type)
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{
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/* gen6 has bit11-4 for physical addr bit39-32 */
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addr |= (addr >> 28) & 0xff0;
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/* Type checking must be done elsewhere */
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return addr | bridge->driver->masks[type].mask;
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}
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static const struct agp_bridge_driver intel_810_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_i810_sizes,
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@ -1353,8 +1282,6 @@ static const struct agp_bridge_driver intel_830_driver = {
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.configure = intel_fake_agp_configure,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_gtt_cleanup,
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.mask_memory = intel_i810_mask_memory,
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.masks = intel_i810_masks,
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.agp_enable = intel_fake_agp_enable,
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.cache_flush = global_cache_flush,
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.create_gatt_table = intel_fake_agp_create_gatt_table,
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@ -1367,7 +1294,6 @@ static const struct agp_bridge_driver intel_830_driver = {
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.agp_alloc_pages = agp_generic_alloc_pages,
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.agp_destroy_page = agp_generic_destroy_page,
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.agp_destroy_pages = agp_generic_destroy_pages,
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
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.chipset_flush = intel_i830_chipset_flush,
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};
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@ -1379,8 +1305,6 @@ static const struct agp_bridge_driver intel_915_driver = {
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.configure = intel_fake_agp_configure,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_gtt_cleanup,
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.mask_memory = intel_i810_mask_memory,
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.masks = intel_i810_masks,
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.agp_enable = intel_fake_agp_enable,
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.cache_flush = global_cache_flush,
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.create_gatt_table = intel_fake_agp_create_gatt_table,
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@ -1393,7 +1317,6 @@ static const struct agp_bridge_driver intel_915_driver = {
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.agp_alloc_pages = agp_generic_alloc_pages,
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.agp_destroy_page = agp_generic_destroy_page,
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.agp_destroy_pages = agp_generic_destroy_pages,
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
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.chipset_flush = intel_i915_chipset_flush,
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};
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@ -1405,8 +1328,6 @@ static const struct agp_bridge_driver intel_i965_driver = {
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.configure = intel_fake_agp_configure,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_gtt_cleanup,
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.mask_memory = intel_i965_mask_memory,
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.masks = intel_i810_masks,
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.agp_enable = intel_fake_agp_enable,
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.cache_flush = global_cache_flush,
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.create_gatt_table = intel_fake_agp_create_gatt_table,
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@ -1419,7 +1340,6 @@ static const struct agp_bridge_driver intel_i965_driver = {
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.agp_alloc_pages = agp_generic_alloc_pages,
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.agp_destroy_page = agp_generic_destroy_page,
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.agp_destroy_pages = agp_generic_destroy_pages,
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
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.chipset_flush = intel_i915_chipset_flush,
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};
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@ -1431,8 +1351,6 @@ static const struct agp_bridge_driver intel_gen6_driver = {
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.configure = intel_fake_agp_configure,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_gtt_cleanup,
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.mask_memory = intel_gen6_mask_memory,
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.masks = intel_gen6_masks,
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.agp_enable = intel_fake_agp_enable,
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.cache_flush = global_cache_flush,
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.create_gatt_table = intel_fake_agp_create_gatt_table,
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@ -1445,7 +1363,6 @@ static const struct agp_bridge_driver intel_gen6_driver = {
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.agp_alloc_pages = agp_generic_alloc_pages,
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.agp_destroy_page = agp_generic_destroy_page,
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.agp_destroy_pages = agp_generic_destroy_pages,
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.agp_type_to_mask_type = intel_gen6_type_to_mask_type,
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.chipset_flush = intel_i915_chipset_flush,
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};
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@ -1457,8 +1374,6 @@ static const struct agp_bridge_driver intel_g33_driver = {
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.configure = intel_fake_agp_configure,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_gtt_cleanup,
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.mask_memory = intel_i965_mask_memory,
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.masks = intel_i810_masks,
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.agp_enable = intel_fake_agp_enable,
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.cache_flush = global_cache_flush,
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.create_gatt_table = intel_fake_agp_create_gatt_table,
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@ -1471,10 +1386,12 @@ static const struct agp_bridge_driver intel_g33_driver = {
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.agp_alloc_pages = agp_generic_alloc_pages,
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.agp_destroy_page = agp_generic_destroy_page,
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.agp_destroy_pages = agp_generic_destroy_pages,
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
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.chipset_flush = intel_i915_chipset_flush,
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};
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static const struct intel_gtt_driver i81x_gtt_driver = {
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.gen = 1,
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};
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static const struct intel_gtt_driver i8xx_gtt_driver = {
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.gen = 2,
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.setup = i830_setup,
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@ -1538,10 +1455,14 @@ static const struct intel_gtt_driver_description {
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const struct agp_bridge_driver *gmch_driver;
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const struct intel_gtt_driver *gtt_driver;
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} intel_gtt_chipsets[] = {
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{ PCI_DEVICE_ID_INTEL_82810_IG1, "i810", &intel_810_driver , NULL},
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{ PCI_DEVICE_ID_INTEL_82810_IG3, "i810", &intel_810_driver , NULL},
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{ PCI_DEVICE_ID_INTEL_82810E_IG, "i810", &intel_810_driver , NULL},
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{ PCI_DEVICE_ID_INTEL_82815_CGC, "i815", &intel_810_driver , NULL},
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{ PCI_DEVICE_ID_INTEL_82810_IG1, "i810", &intel_810_driver,
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&i81x_gtt_driver},
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{ PCI_DEVICE_ID_INTEL_82810_IG3, "i810", &intel_810_driver,
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&i81x_gtt_driver},
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{ PCI_DEVICE_ID_INTEL_82810E_IG, "i810", &intel_810_driver,
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&i81x_gtt_driver},
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{ PCI_DEVICE_ID_INTEL_82815_CGC, "i815", &intel_810_driver,
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&i81x_gtt_driver},
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{ PCI_DEVICE_ID_INTEL_82830_CGC, "830M",
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&intel_830_driver , &i8xx_gtt_driver},
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{ PCI_DEVICE_ID_INTEL_82845G_IG, "830M",
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@ -1664,9 +1585,9 @@ int intel_gmch_probe(struct pci_dev *pdev,
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dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);
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if (bridge->driver->mask_memory == intel_gen6_mask_memory)
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if (intel_private.driver->write_entry == gen6_write_entry)
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mask = 40;
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else if (bridge->driver->mask_memory == intel_i965_mask_memory)
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else if (intel_private.driver->write_entry == i965_write_entry)
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mask = 36;
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else
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mask = 32;
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