generic GPIO support for the Freescale Coldfire 5206.
Add support for the 5206. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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af39bb8b07
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3 changed files with 58 additions and 3 deletions
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@ -85,9 +85,15 @@
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#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */
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#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */
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#endif
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#endif
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#define MCFSIM_PADDR 0x1c5 /* Parallel Direction (r/w) */
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#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */
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#define MCFSIM_PADAT 0x1c9 /* Parallel Port Value (r/w) */
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#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */
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/*
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* Generic GPIO
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*/
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#define MCFGPIO_PIN_MAX 8
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#define MCFGPIO_IRQ_VECBASE -1
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#define MCFGPIO_IRQ_MAX -1
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/*
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/*
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* Some symbol defines for the Parallel Port Pin Assignment Register
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* Some symbol defines for the Parallel Port Pin Assignment Register
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*/
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*/
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@ -14,5 +14,5 @@
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asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
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asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
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obj-y := config.o
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obj-y := config.o gpio.o
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49
arch/m68knommu/platform/5206/gpio.c
Normal file
49
arch/m68knommu/platform/5206/gpio.c
Normal file
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@ -0,0 +1,49 @@
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/*
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* Coldfire generic GPIO support
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*
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* (C) Copyright 2009, Steven King <sfking@fdwdc.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfgpio.h>
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static struct mcf_gpio_chip mcf_gpio_chips[] = {
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{
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.gpio_chip = {
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.label = "PP",
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.request = mcf_gpio_request,
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.free = mcf_gpio_free,
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.direction_input = mcf_gpio_direction_input,
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.direction_output = mcf_gpio_direction_output,
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.get = mcf_gpio_get_value,
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.set = mcf_gpio_set_value,
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.ngpio = 8,
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},
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.pddr = MCFSIM_PADDR,
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.podr = MCFSIM_PADAT,
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.ppdr = MCFSIM_PADAT,
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},
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};
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static int __init mcf_gpio_init(void)
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{
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unsigned i = 0;
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while (i < ARRAY_SIZE(mcf_gpio_chips))
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(void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
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return 0;
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}
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core_initcall(mcf_gpio_init);
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