Merge branch 'regmap-asoc' into for-3.2
This commit is contained in:
Mark Brown
commit
bb3784ae36
3 changed files with 43 additions and 285 deletions
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@ -19,6 +19,7 @@
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/regmap.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/control.h>
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@ -260,6 +261,7 @@ extern struct snd_ac97_bus_ops soc_ac97_ops;
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enum snd_soc_control_type {
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SND_SOC_I2C = 1,
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SND_SOC_SPI,
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SND_SOC_REGMAP,
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};
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enum snd_soc_compress_type {
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@ -576,6 +578,7 @@ struct snd_soc_codec {
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const void *reg_def_copy;
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const struct snd_soc_cache_ops *cache_ops;
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struct mutex cache_rw_mutex;
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int val_bytes;
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/* dapm */
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struct snd_soc_dapm_context dapm;
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@ -7,6 +7,8 @@ menuconfig SND_SOC
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select SND_PCM
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select AC97_BUS if SND_SOC_AC97_BUS
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select SND_JACK if INPUT=y || INPUT=SND
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select REGMAP_I2C if I2C
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select REGMAP_SPI if SPI_MASTER
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---help---
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If you want ASoC support, you should say Y here and also to the
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@ -13,26 +13,13 @@
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#include <linux/i2c.h>
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#include <linux/spi/spi.h>
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#include <linux/regmap.h>
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#include <sound/soc.h>
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#include <trace/events/asoc.h>
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#ifdef CONFIG_SPI_MASTER
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static int do_spi_write(void *control, const char *data, int len)
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{
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struct spi_device *spi = control;
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int ret;
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ret = spi_write(spi, data, len);
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if (ret < 0)
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return ret;
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return len;
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}
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#endif
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static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value, const void *data, int len)
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static int hw_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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int ret;
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@ -49,13 +36,7 @@ static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
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return 0;
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}
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ret = codec->hw_write(codec->control_data, data, len);
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if (ret == len)
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return 0;
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if (ret < 0)
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return ret;
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else
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return -EIO;
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return regmap_write(codec->control_data, reg, value);
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}
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static unsigned int hw_read(struct snd_soc_codec *codec, unsigned int reg)
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@ -69,8 +50,11 @@ static unsigned int hw_read(struct snd_soc_codec *codec, unsigned int reg)
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if (codec->cache_only)
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return -1;
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BUG_ON(!codec->hw_read);
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return codec->hw_read(codec, reg);
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ret = regmap_read(codec->control_data, reg, &val);
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if (ret == 0)
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return val;
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else
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return ret;
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}
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ret = snd_soc_cache_read(codec, reg, &val);
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@ -79,183 +63,18 @@ static unsigned int hw_read(struct snd_soc_codec *codec, unsigned int reg)
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return val;
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}
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static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u16 data;
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data = cpu_to_be16((reg << 12) | (value & 0xffffff));
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return do_hw_write(codec, reg, value, &data, 2);
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}
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static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u16 data;
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data = cpu_to_be16((reg << 9) | (value & 0x1ff));
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return do_hw_write(codec, reg, value, &data, 2);
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}
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static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u8 data[2];
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reg &= 0xff;
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data[0] = reg;
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data[1] = value & 0xff;
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return do_hw_write(codec, reg, value, data, 2);
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}
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static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u8 data[3];
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u16 val = cpu_to_be16(value);
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data[0] = reg;
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memcpy(&data[1], &val, sizeof(val));
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return do_hw_write(codec, reg, value, data, 3);
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}
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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static unsigned int do_i2c_read(struct snd_soc_codec *codec,
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void *reg, int reglen,
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void *data, int datalen)
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{
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struct i2c_msg xfer[2];
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int ret;
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struct i2c_client *client = codec->control_data;
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/* Write register */
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xfer[0].addr = client->addr;
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xfer[0].flags = 0;
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xfer[0].len = reglen;
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xfer[0].buf = reg;
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/* Read data */
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xfer[1].addr = client->addr;
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xfer[1].flags = I2C_M_RD;
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xfer[1].len = datalen;
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xfer[1].buf = data;
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ret = i2c_transfer(client->adapter, xfer, 2);
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if (ret == 2)
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return 0;
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else if (ret < 0)
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return ret;
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else
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return -EIO;
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}
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#endif
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
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unsigned int r)
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{
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u8 reg = r;
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u8 data;
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int ret;
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ret = do_i2c_read(codec, ®, 1, &data, 1);
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if (ret < 0)
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return 0;
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return data;
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}
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#else
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#define snd_soc_8_8_read_i2c NULL
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#endif
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
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unsigned int r)
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{
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u8 reg = r;
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u16 data;
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int ret;
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ret = do_i2c_read(codec, ®, 1, &data, 2);
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if (ret < 0)
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return 0;
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return (data >> 8) | ((data & 0xff) << 8);
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}
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#else
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#define snd_soc_8_16_read_i2c NULL
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#endif
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
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unsigned int r)
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{
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u16 reg = r;
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u8 data;
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int ret;
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ret = do_i2c_read(codec, ®, 2, &data, 1);
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if (ret < 0)
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return 0;
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return data;
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}
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#else
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#define snd_soc_16_8_read_i2c NULL
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#endif
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static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u8 data[3];
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u16 rval = cpu_to_be16(reg);
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memcpy(data, &rval, sizeof(rval));
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data[2] = value;
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return do_hw_write(codec, reg, value, data, 3);
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}
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
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unsigned int r)
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{
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u16 reg = cpu_to_be16(r);
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u16 data;
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int ret;
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ret = do_i2c_read(codec, ®, 2, &data, 2);
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if (ret < 0)
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return 0;
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return be16_to_cpu(data);
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}
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#else
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#define snd_soc_16_16_read_i2c NULL
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#endif
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static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u16 data[2];
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data[0] = cpu_to_be16(reg);
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data[1] = cpu_to_be16(value);
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return do_hw_write(codec, reg, value, data, sizeof(data));
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}
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/* Primitive bulk write support for soc-cache. The data pointed to by
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* `data' needs to already be in the form the hardware expects
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* including any leading register specific data. Any data written
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* through this function will not go through the cache as it only
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* handles writing to volatile or out of bounds registers.
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* `data' needs to already be in the form the hardware expects. Any
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* data written through this function will not go through the cache as
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* it only handles writing to volatile or out of bounds registers.
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*
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* This is currently only supported for devices using the regmap API
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* wrappers.
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*/
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static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
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static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec,
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unsigned int reg,
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const void *data, size_t len)
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{
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int ret;
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/* To ensure that we don't get out of sync with the cache, check
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* whether the base register is volatile or if we've directly asked
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* to bypass the cache. Out of bounds registers are considered
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@ -266,66 +85,9 @@ static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int r
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&& reg < codec->driver->reg_cache_size)
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return -EINVAL;
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switch (codec->control_type) {
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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case SND_SOC_I2C:
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ret = i2c_master_send(to_i2c_client(codec->dev), data, len);
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break;
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#endif
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#if defined(CONFIG_SPI_MASTER)
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case SND_SOC_SPI:
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ret = spi_write(to_spi_device(codec->dev), data, len);
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break;
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#endif
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default:
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BUG();
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}
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if (ret == len)
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return 0;
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if (ret < 0)
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return ret;
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else
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return -EIO;
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return regmap_raw_write(codec->control_data, reg, data, len);
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}
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static struct {
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int addr_bits;
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int data_bits;
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int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
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unsigned int (*read)(struct snd_soc_codec *, unsigned int);
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unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
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} io_types[] = {
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{
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.addr_bits = 4, .data_bits = 12,
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.write = snd_soc_4_12_write,
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},
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{
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.addr_bits = 7, .data_bits = 9,
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.write = snd_soc_7_9_write,
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},
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{
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.addr_bits = 8, .data_bits = 8,
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.write = snd_soc_8_8_write,
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.i2c_read = snd_soc_8_8_read_i2c,
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},
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{
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.addr_bits = 8, .data_bits = 16,
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.write = snd_soc_8_16_write,
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.i2c_read = snd_soc_8_16_read_i2c,
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},
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{
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.addr_bits = 16, .data_bits = 8,
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.write = snd_soc_16_8_write,
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.i2c_read = snd_soc_16_8_read_i2c,
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},
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{
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.addr_bits = 16, .data_bits = 16,
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.write = snd_soc_16_16_write,
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.i2c_read = snd_soc_16_16_read_i2c,
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},
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};
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/**
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* snd_soc_codec_set_cache_io: Set up standard I/O functions.
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*
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@ -349,47 +111,38 @@ int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
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int addr_bits, int data_bits,
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enum snd_soc_control_type control)
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{
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int i;
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struct regmap_config config;
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for (i = 0; i < ARRAY_SIZE(io_types); i++)
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if (io_types[i].addr_bits == addr_bits &&
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io_types[i].data_bits == data_bits)
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break;
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if (i == ARRAY_SIZE(io_types)) {
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printk(KERN_ERR
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"No I/O functions for %d bit address %d bit data\n",
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addr_bits, data_bits);
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return -EINVAL;
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}
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codec->write = io_types[i].write;
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memset(&config, 0, sizeof(config));
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codec->write = hw_write;
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codec->read = hw_read;
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codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
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config.reg_bits = addr_bits;
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config.val_bits = data_bits;
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switch (control) {
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case SND_SOC_I2C:
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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codec->hw_write = (hw_write_t)i2c_master_send;
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#endif
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if (io_types[i].i2c_read)
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codec->hw_read = io_types[i].i2c_read;
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codec->control_data = container_of(codec->dev,
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struct i2c_client,
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dev);
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codec->control_data = regmap_init_i2c(to_i2c_client(codec->dev),
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&config);
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break;
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case SND_SOC_SPI:
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#ifdef CONFIG_SPI_MASTER
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codec->hw_write = do_spi_write;
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#endif
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codec->control_data = container_of(codec->dev,
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struct spi_device,
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dev);
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codec->control_data = regmap_init_spi(to_spi_device(codec->dev),
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&config);
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break;
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case SND_SOC_REGMAP:
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/* Device has made its own regmap arrangements */
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break;
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default:
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return -EINVAL;
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}
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if (IS_ERR(codec->control_data))
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return PTR_ERR(codec->control_data);
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return 0;
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}
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EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
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