tg3: Add TSO loopback test
This patch adds code to exercise the TSO portion of the device through a phy loopback test. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson
David S. Miller
parent
00c266b794
commit
bb158d6964
1 changed files with 125 additions and 37 deletions
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@ -11076,11 +11076,35 @@ static int tg3_test_memory(struct tg3 *tp)
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#define TG3_MAC_LOOPBACK 0
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#define TG3_PHY_LOOPBACK 1
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#define TG3_TSO_LOOPBACK 2
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#define TG3_TSO_MSS 500
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#define TG3_TSO_IP_HDR_LEN 20
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#define TG3_TSO_TCP_HDR_LEN 20
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#define TG3_TSO_TCP_OPT_LEN 12
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static const u8 tg3_tso_header[] = {
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0x08, 0x00,
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0x45, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x40, 0x00,
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0x40, 0x06, 0x00, 0x00,
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0x0a, 0x00, 0x00, 0x01,
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0x0a, 0x00, 0x00, 0x02,
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0x0d, 0x00, 0xe0, 0x00,
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0x00, 0x00, 0x01, 0x00,
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0x00, 0x00, 0x02, 0x00,
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0x80, 0x10, 0x10, 0x00,
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0x14, 0x09, 0x00, 0x00,
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0x01, 0x01, 0x08, 0x0a,
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0x11, 0x11, 0x11, 0x11,
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0x11, 0x11, 0x11, 0x11,
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};
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static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, int loopback_mode)
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{
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u32 mac_mode, rx_start_idx, rx_idx, tx_idx, opaque_key;
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u32 desc_idx, coal_now;
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u32 base_flags = 0, mss = 0, desc_idx, coal_now, data_off, val;
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struct sk_buff *skb, *rx_skb;
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u8 *tx_data;
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dma_addr_t map;
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@ -11119,9 +11143,7 @@ static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, int loopback_mode)
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else
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mac_mode |= MAC_MODE_PORT_MODE_GMII;
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tw32(MAC_MODE, mac_mode);
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} else if (loopback_mode == TG3_PHY_LOOPBACK) {
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u32 val;
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} else {
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if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
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tg3_phy_fet_toggle_apd(tp, false);
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val = BMCR_LOOPBACK | BMCR_FULLDPLX | BMCR_SPEED100;
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@ -11169,8 +11191,6 @@ static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, int loopback_mode)
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break;
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mdelay(1);
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}
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} else {
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return -EINVAL;
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}
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err = -EIO;
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@ -11186,7 +11206,54 @@ static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, int loopback_mode)
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tw32(MAC_RX_MTU_SIZE, tx_len + ETH_FCS_LEN);
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for (i = 14; i < tx_len; i++)
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if (loopback_mode == TG3_TSO_LOOPBACK) {
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struct iphdr *iph = (struct iphdr *)&tx_data[ETH_HLEN];
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u32 hdr_len = TG3_TSO_IP_HDR_LEN + TG3_TSO_TCP_HDR_LEN +
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TG3_TSO_TCP_OPT_LEN;
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memcpy(tx_data + ETH_ALEN * 2, tg3_tso_header,
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sizeof(tg3_tso_header));
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mss = TG3_TSO_MSS;
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val = tx_len - ETH_ALEN * 2 - sizeof(tg3_tso_header);
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num_pkts = DIV_ROUND_UP(val, TG3_TSO_MSS);
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/* Set the total length field in the IP header */
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iph->tot_len = htons((u16)(mss + hdr_len));
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base_flags = (TXD_FLAG_CPU_PRE_DMA |
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TXD_FLAG_CPU_POST_DMA);
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if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {
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struct tcphdr *th;
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val = ETH_HLEN + TG3_TSO_IP_HDR_LEN;
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th = (struct tcphdr *)&tx_data[val];
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th->check = 0;
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} else
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base_flags |= TXD_FLAG_TCPUDP_CSUM;
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if (tp->tg3_flags2 & TG3_FLG2_HW_TSO_3) {
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mss |= (hdr_len & 0xc) << 12;
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if (hdr_len & 0x10)
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base_flags |= 0x00000010;
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base_flags |= (hdr_len & 0x3e0) << 5;
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} else if (tp->tg3_flags2 & TG3_FLG2_HW_TSO_2)
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mss |= hdr_len << 9;
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else if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_1) ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
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mss |= (TG3_TSO_TCP_OPT_LEN << 9);
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} else {
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base_flags |= (TG3_TSO_TCP_OPT_LEN << 10);
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}
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data_off = ETH_ALEN * 2 + sizeof(tg3_tso_header);
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} else {
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num_pkts = 1;
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data_off = ETH_HLEN;
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}
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for (i = data_off; i < tx_len; i++)
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tx_data[i] = (u8) (i & 0xff);
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map = pci_map_single(tp->pdev, skb->data, tx_len, PCI_DMA_TODEVICE);
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@ -11202,12 +11269,10 @@ static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, int loopback_mode)
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rx_start_idx = rnapi->hw_status->idx[0].rx_producer;
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num_pkts = 0;
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tg3_set_txd(tnapi, tnapi->tx_prod, map, tx_len, 0, 1);
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tg3_set_txd(tnapi, tnapi->tx_prod, map, tx_len,
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base_flags, (mss << 1) | 1);
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tnapi->tx_prod++;
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num_pkts++;
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tw32_tx_mbox(tnapi->prodmbox, tnapi->tx_prod);
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tr32_mailbox(tnapi->prodmbox);
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@ -11237,38 +11302,56 @@ static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, int loopback_mode)
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if (rx_idx != rx_start_idx + num_pkts)
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goto out;
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desc = &rnapi->rx_rcb[rx_start_idx];
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desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
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opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
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val = data_off;
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while (rx_idx != rx_start_idx) {
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desc = &rnapi->rx_rcb[rx_start_idx++];
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desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
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opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
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if ((desc->err_vlan & RXD_ERR_MASK) != 0 &&
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(desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII))
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goto out;
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rx_len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4;
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if (rx_len != tx_len)
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goto out;
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if (pktsz <= TG3_RX_STD_DMA_SZ - ETH_FCS_LEN) {
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if (opaque_key != RXD_OPAQUE_RING_STD)
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if ((desc->err_vlan & RXD_ERR_MASK) != 0 &&
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(desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII))
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goto out;
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rx_skb = tpr->rx_std_buffers[desc_idx].skb;
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map = dma_unmap_addr(&tpr->rx_std_buffers[desc_idx], mapping);
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} else {
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if (opaque_key != RXD_OPAQUE_RING_JUMBO)
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rx_len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT)
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- ETH_FCS_LEN;
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if (loopback_mode != TG3_TSO_LOOPBACK) {
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if (rx_len != tx_len)
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goto out;
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if (pktsz <= TG3_RX_STD_DMA_SZ - ETH_FCS_LEN) {
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if (opaque_key != RXD_OPAQUE_RING_STD)
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goto out;
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} else {
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if (opaque_key != RXD_OPAQUE_RING_JUMBO)
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goto out;
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}
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} else if ((desc->type_flags & RXD_FLAG_TCPUDP_CSUM) &&
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(desc->ip_tcp_csum & RXD_TCPCSUM_MASK)
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>> RXD_TCPCSUM_SHIFT == 0xffff) {
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goto out;
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}
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if (opaque_key == RXD_OPAQUE_RING_STD) {
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rx_skb = tpr->rx_std_buffers[desc_idx].skb;
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map = dma_unmap_addr(&tpr->rx_std_buffers[desc_idx],
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mapping);
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} else if (opaque_key == RXD_OPAQUE_RING_JUMBO) {
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rx_skb = tpr->rx_jmb_buffers[desc_idx].skb;
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map = dma_unmap_addr(&tpr->rx_jmb_buffers[desc_idx],
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mapping);
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} else
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goto out;
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rx_skb = tpr->rx_jmb_buffers[desc_idx].skb;
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map = dma_unmap_addr(&tpr->rx_jmb_buffers[desc_idx], mapping);
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pci_dma_sync_single_for_cpu(tp->pdev, map, rx_len,
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PCI_DMA_FROMDEVICE);
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for (i = data_off; i < rx_len; i++, val++) {
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if (*(rx_skb->data + i) != (u8) (val & 0xff))
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goto out;
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}
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}
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pci_dma_sync_single_for_cpu(tp->pdev, map, rx_len, PCI_DMA_FROMDEVICE);
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for (i = 14; i < tx_len; i++) {
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if (*(rx_skb->data + i) != (u8) (i & 0xff))
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goto out;
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}
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err = 0;
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/* tg3_free_rings will unmap and free the rx_skb */
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@ -11278,10 +11361,11 @@ static int tg3_run_loopback(struct tg3 *tp, u32 pktsz, int loopback_mode)
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#define TG3_STD_LOOPBACK_FAILED 1
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#define TG3_JMB_LOOPBACK_FAILED 2
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#define TG3_TSO_LOOPBACK_FAILED 4
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#define TG3_MAC_LOOPBACK_SHIFT 0
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#define TG3_PHY_LOOPBACK_SHIFT 4
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#define TG3_LOOPBACK_FAILED 0x00000033
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#define TG3_LOOPBACK_FAILED 0x00000077
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static int tg3_test_loopback(struct tg3 *tp)
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{
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@ -11358,6 +11442,10 @@ static int tg3_test_loopback(struct tg3 *tp)
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if (tg3_run_loopback(tp, ETH_FRAME_LEN, TG3_PHY_LOOPBACK))
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err |= TG3_STD_LOOPBACK_FAILED <<
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TG3_PHY_LOOPBACK_SHIFT;
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if ((tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) &&
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tg3_run_loopback(tp, ETH_FRAME_LEN, TG3_TSO_LOOPBACK))
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err |= TG3_TSO_LOOPBACK_FAILED <<
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TG3_PHY_LOOPBACK_SHIFT;
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if ((tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) &&
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tg3_run_loopback(tp, 9000 + ETH_HLEN, TG3_PHY_LOOPBACK))
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err |= TG3_JMB_LOOPBACK_FAILED <<
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