V4L/DVB (12901): DiB0700: add support for STK807XP and STK807XPVR
This patchs adds support for the DiB8000 based devices STK807xP and STK807xPVR to the dib0700-device-tree. [mchehab@redhat.com: Fix merge conflicts] Signed-off-by: Olivier Grenie <Olivier.Grenie@dibcom.fr> Signed-off-by: Patrick Boettcher <pboettcher@dibcom.fr> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Patrick Boettcher
Mauro Carvalho Chehab
parent
77e2c0f5d4
commit
ba3fe3a963
2 changed files with 368 additions and 1 deletions
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@ -4,13 +4,14 @@
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation, version 2.
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*
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* Copyright (C) 2005-7 DiBcom, SA
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* Copyright (C) 2005-9 DiBcom, SA et al
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*/
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#include "dib0700.h"
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#include "dib3000mc.h"
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#include "dib7000m.h"
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#include "dib7000p.h"
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#include "dib8000.h"
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#include "mt2060.h"
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#include "mt2266.h"
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#include "tuner-xc2028.h"
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@ -1268,6 +1269,306 @@ static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
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return adap->fe == NULL ? -ENODEV : 0;
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}
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/* DIB807x generic */
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static struct dibx000_agc_config dib807x_agc_config[2] = {
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{
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BAND_VHF,
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/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
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* P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
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* P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
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* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
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* P_agc_write=0 */
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(0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
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(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
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(0 << 0), /* setup*/
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600, /* inv_gain*/
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10, /* time_stabiliz*/
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0, /* alpha_level*/
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118, /* thlock*/
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0, /* wbd_inv*/
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3530, /* wbd_ref*/
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1, /* wbd_sel*/
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5, /* wbd_alpha*/
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65535, /* agc1_max*/
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0, /* agc1_min*/
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65535, /* agc2_max*/
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0, /* agc2_min*/
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0, /* agc1_pt1*/
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40, /* agc1_pt2*/
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183, /* agc1_pt3*/
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206, /* agc1_slope1*/
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255, /* agc1_slope2*/
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72, /* agc2_pt1*/
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152, /* agc2_pt2*/
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88, /* agc2_slope1*/
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90, /* agc2_slope2*/
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17, /* alpha_mant*/
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27, /* alpha_exp*/
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23, /* beta_mant*/
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51, /* beta_exp*/
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0, /* perform_agc_softsplit*/
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}, {
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BAND_UHF,
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/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
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* P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
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* P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
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* P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
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* P_agc_write=0 */
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(0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
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(0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
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(0 << 0), /* setup */
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600, /* inv_gain*/
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10, /* time_stabiliz*/
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0, /* alpha_level*/
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118, /* thlock*/
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0, /* wbd_inv*/
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3530, /* wbd_ref*/
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1, /* wbd_sel*/
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5, /* wbd_alpha*/
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65535, /* agc1_max*/
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0, /* agc1_min*/
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65535, /* agc2_max*/
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0, /* agc2_min*/
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0, /* agc1_pt1*/
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40, /* agc1_pt2*/
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183, /* agc1_pt3*/
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206, /* agc1_slope1*/
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255, /* agc1_slope2*/
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72, /* agc2_pt1*/
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152, /* agc2_pt2*/
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88, /* agc2_slope1*/
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90, /* agc2_slope2*/
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17, /* alpha_mant*/
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27, /* alpha_exp*/
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23, /* beta_mant*/
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51, /* beta_exp*/
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0, /* perform_agc_softsplit*/
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}
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};
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static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
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60000, 15000, /* internal, sampling*/
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1, 20, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass*/
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0, 0, 1, 1, 2, /* misc: refdiv, bypclk_div, IO_CLK_en_core,
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ADClkSrc, modulo */
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(3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
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(0 << 25) | 0, /* ifreq = 0.000000 MHz*/
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18179755, /* timf*/
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12000000, /* xtal_hz*/
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};
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static struct dib8000_config dib807x_dib8000_config[2] = {
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{
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.output_mpeg2_in_188_bytes = 1,
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.agc_config_count = 2,
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.agc = dib807x_agc_config,
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.pll = &dib807x_bw_config_12_mhz,
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.tuner_is_baseband = 1,
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.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
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.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
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.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
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.hostbus_diversity = 1,
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.div_cfg = 1,
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.agc_control = &dib0070_ctrl_agc_filter,
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.output_mode = OUTMODE_MPEG2_FIFO,
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.drives = 0x2d98,
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}, {
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.output_mpeg2_in_188_bytes = 1,
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.agc_config_count = 2,
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.agc = dib807x_agc_config,
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.pll = &dib807x_bw_config_12_mhz,
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.tuner_is_baseband = 1,
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.gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
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.gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
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.gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
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.hostbus_diversity = 1,
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.agc_control = &dib0070_ctrl_agc_filter,
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.output_mode = OUTMODE_MPEG2_FIFO,
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.drives = 0x2d98,
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}
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};
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static int dib807x_tuner_reset(struct dvb_frontend *fe, int onoff)
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{
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return dib8000_set_gpio(fe, 5, 0, !onoff);
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}
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static int dib807x_tuner_sleep(struct dvb_frontend *fe, int onoff)
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{
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return dib8000_set_gpio(fe, 0, 0, onoff);
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}
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static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
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{ 240, 7},
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{ 0xffff, 6},
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};
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static struct dib0070_config dib807x_dib0070_config[2] = {
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{
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.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
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.reset = dib807x_tuner_reset,
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.sleep = dib807x_tuner_sleep,
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.clock_khz = 12000,
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.clock_pad_drive = 4,
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.vga_filter = 1,
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.force_crystal_mode = 1,
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.enable_third_order_filter = 1,
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.charge_pump = 0,
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.wbd_gain = dib8070_wbd_gain_cfg,
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.osc_buffer_state = 0,
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.freq_offset_khz_uhf = -100,
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.freq_offset_khz_vhf = -100,
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}, {
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.i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
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.reset = dib807x_tuner_reset,
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.sleep = dib807x_tuner_sleep,
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.clock_khz = 12000,
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.clock_pad_drive = 2,
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.vga_filter = 1,
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.force_crystal_mode = 1,
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.enable_third_order_filter = 1,
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.charge_pump = 0,
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.wbd_gain = dib8070_wbd_gain_cfg,
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.osc_buffer_state = 0,
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.freq_offset_khz_uhf = -25,
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.freq_offset_khz_vhf = -25,
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}
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};
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static int dib807x_set_param_override(struct dvb_frontend *fe,
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struct dvb_frontend_parameters *fep)
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{
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struct dvb_usb_adapter *adap = fe->dvb->priv;
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struct dib0700_adapter_state *state = adap->priv;
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u16 offset = dib0070_wbd_offset(fe);
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u8 band = BAND_OF_FREQUENCY(fep->frequency/1000);
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switch (band) {
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case BAND_VHF:
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offset += 750;
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break;
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case BAND_UHF: /* fall-thru wanted */
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default:
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offset += 250; break;
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}
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deb_info("WBD for DiB8000: %d\n", offset);
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dib8000_set_wbd_ref(fe, offset);
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return state->set_param_save(fe, fep);
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}
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static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
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{
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struct dib0700_adapter_state *st = adap->priv;
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struct i2c_adapter *tun_i2c = dib8000_get_i2c_master(adap->fe,
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DIBX000_I2C_INTERFACE_TUNER, 1);
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if (adap->id == 0) {
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if (dvb_attach(dib0070_attach, adap->fe, tun_i2c,
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&dib807x_dib0070_config[0]) == NULL)
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return -ENODEV;
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} else {
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if (dvb_attach(dib0070_attach, adap->fe, tun_i2c,
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&dib807x_dib0070_config[1]) == NULL)
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return -ENODEV;
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}
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st->set_param_save = adap->fe->ops.tuner_ops.set_params;
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adap->fe->ops.tuner_ops.set_params = dib807x_set_param_override;
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return 0;
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}
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/* STK807x */
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static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
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{
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dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
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msleep(10);
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dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
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dib0700_ctrl_clock(adap->dev, 72, 1);
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msleep(10);
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dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
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msleep(10);
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dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
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dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
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0x80);
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adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80,
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&dib807x_dib8000_config[0]);
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return adap->fe == NULL ? -ENODEV : 0;
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}
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/* STK807xPVR */
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static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
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{
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dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
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msleep(30);
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dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
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msleep(500);
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dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
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dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
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dib0700_ctrl_clock(adap->dev, 72, 1);
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msleep(10);
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dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
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msleep(10);
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dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
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/* initialize IC 0 */
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dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x80);
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adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x80,
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&dib807x_dib8000_config[0]);
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return adap->fe == NULL ? -ENODEV : 0;
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}
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static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
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{
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/* initialize IC 1 */
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dib8000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x82);
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adap->fe = dvb_attach(dib8000_attach, &adap->dev->i2c_adap, 0x82,
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&dib807x_dib8000_config[1]);
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return adap->fe == NULL ? -ENODEV : 0;
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}
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/* STK7070PD */
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static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
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{
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@ -1557,6 +1858,8 @@ struct usb_device_id dib0700_usb_id_table[] = {
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{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
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{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
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/* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
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{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
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{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
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{ 0 } /* Terminating entry */
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};
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MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
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@ -2044,6 +2347,68 @@ struct dvb_usb_device_properties dib0700_devices[] = {
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{ NULL },
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},
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},
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.rc_interval = DEFAULT_RC_INTERVAL,
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.rc_key_map = dib0700_rc_keys,
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.rc_key_map_size = ARRAY_SIZE(dib0700_rc_keys),
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.rc_query = dib0700_rc_query
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}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
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.num_adapters = 1,
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.adapter = {
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{
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.frontend_attach = stk807x_frontend_attach,
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.tuner_attach = dib807x_tuner_attach,
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DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
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.size_of_priv =
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sizeof(struct dib0700_adapter_state),
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},
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},
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.num_device_descs = 1,
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.devices = {
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{ "DiBcom STK807xP reference design",
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{ &dib0700_usb_id_table[62], NULL },
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{ NULL },
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},
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},
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.rc_interval = DEFAULT_RC_INTERVAL,
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.rc_key_map = dib0700_rc_keys,
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.rc_key_map_size = ARRAY_SIZE(dib0700_rc_keys),
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.rc_query = dib0700_rc_query
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}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
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.num_adapters = 2,
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.adapter = {
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{
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.frontend_attach = stk807xpvr_frontend_attach0,
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.tuner_attach = dib807x_tuner_attach,
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DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
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.size_of_priv =
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sizeof(struct dib0700_adapter_state),
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},
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{
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.frontend_attach = stk807xpvr_frontend_attach1,
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.tuner_attach = dib807x_tuner_attach,
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DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
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.size_of_priv =
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sizeof(struct dib0700_adapter_state),
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},
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},
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.num_device_descs = 1,
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.devices = {
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{ "DiBcom STK807xPVR reference design",
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{ &dib0700_usb_id_table[61], NULL },
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{ NULL },
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},
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},
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.rc_interval = DEFAULT_RC_INTERVAL,
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.rc_key_map = dib0700_rc_keys,
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.rc_key_map_size = ARRAY_SIZE(dib0700_rc_keys),
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@ -95,6 +95,8 @@
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#define USB_PID_DIBCOM_STK7700_U7000 0x7001
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#define USB_PID_DIBCOM_STK7070P 0x1ebc
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#define USB_PID_DIBCOM_STK7070PD 0x1ebe
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#define USB_PID_DIBCOM_STK807XP 0x1f90
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#define USB_PID_DIBCOM_STK807XPVR 0x1f98
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#define USB_PID_DIBCOM_ANCHOR_2135_COLD 0x2131
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#define USB_PID_DIBCOM_STK7770P 0x1e80
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#define USB_PID_DPOSH_M9206_COLD 0x9206
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