Merge remote-tracking branch 'asoc/topic/adsp' into asoc-wm2200
This commit is contained in:
commit
ba3b8cd26d
3 changed files with 61 additions and 10 deletions
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@ -103,6 +103,13 @@
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#define ADSP1_START_SHIFT 0 /* DSP1_START */
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#define ADSP1_START_WIDTH 1 /* DSP1_START */
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/*
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* ADSP1 Control 31
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*/
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#define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
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#define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
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#define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
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#define ADSP2_CONTROL 0
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#define ADSP2_CLOCKING 1
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#define ADSP2_STATUS1 4
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@ -686,6 +693,16 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp)
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return -EINVAL;
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}
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switch (be32_to_cpu(hdr->rev) & 0xff) {
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case 1:
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break;
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default:
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adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
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file, be32_to_cpu(hdr->rev) & 0xff);
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ret = -EINVAL;
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goto out_fw;
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}
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adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
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(le32_to_cpu(hdr->ver) >> 16) & 0xff,
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(le32_to_cpu(hdr->ver) >> 8) & 0xff,
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@ -698,8 +715,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp)
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pos - firmware->size > sizeof(*blk)) {
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blk = (void*)(&firmware->data[pos]);
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type = be32_to_cpu(blk->type) & 0xff;
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offset = le32_to_cpu(blk->offset) & 0xffffff;
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type = le16_to_cpu(blk->type);
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offset = le16_to_cpu(blk->offset);
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adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
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file, blocks, le32_to_cpu(blk->id),
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@ -712,10 +729,10 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp)
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reg = 0;
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region_name = "Unknown";
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switch (type) {
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case WMFW_NAME_TEXT:
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case WMFW_INFO_TEXT:
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case (WMFW_NAME_TEXT << 8):
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case (WMFW_INFO_TEXT << 8):
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break;
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case WMFW_ABSOLUTE:
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case (WMFW_ABSOLUTE << 8):
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region_name = "register";
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reg = offset;
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break;
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@ -796,12 +813,38 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w,
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struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
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struct wm_adsp *dsp = &dsps[w->shift];
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int ret;
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int val;
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switch (event) {
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case SND_SOC_DAPM_POST_PMU:
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regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
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ADSP1_SYS_ENA, ADSP1_SYS_ENA);
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/*
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* For simplicity set the DSP clock rate to be the
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* SYSCLK rate rather than making it configurable.
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*/
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if(dsp->sysclk_reg) {
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ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
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if (ret != 0) {
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adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
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ret);
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return ret;
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}
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val = (val & dsp->sysclk_mask)
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>> dsp->sysclk_shift;
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ret = regmap_update_bits(dsp->regmap,
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dsp->base + ADSP1_CONTROL_31,
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ADSP1_CLK_SEL_MASK, val);
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if (ret != 0) {
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adsp_err(dsp, "Failed to set clock rate: %d\n",
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ret);
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return ret;
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}
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}
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ret = wm_adsp_load(dsp);
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if (ret != 0)
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goto err;
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@ -40,6 +40,9 @@ struct wm_adsp {
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struct regmap *regmap;
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int base;
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int sysclk_reg;
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int sysclk_mask;
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int sysclk_shift;
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struct list_head alg_regions;
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@ -93,15 +93,20 @@ struct wmfw_adsp2_alg_hdr {
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struct wmfw_coeff_hdr {
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u8 magic[4];
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__le32 len;
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__le32 ver;
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union {
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__be32 rev;
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__le32 ver;
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};
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union {
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__be32 core;
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__le32 core_ver;
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};
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u8 data[];
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} __packed;
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struct wmfw_coeff_item {
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union {
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__be32 type;
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__le32 offset;
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};
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__le16 offset;
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__le16 type;
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__le32 id;
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__le32 ver;
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__le32 sr;
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