char: xillybus: Fix internal data structure initialization
A couple of fields in a data structure, which is used by the driver only, were not initialized properly during the driver's setup. The primary issue with this bug was that channel->wr_buf_size remained zero, so calls to dma_sync_single_for_cpu() took place with zero size, and consequently did nothing. This had a rather minimal practical impact, because (a) these calls are NOPs on Intel/AMD platforms, as well as other platforms with coherent cache, and (b) it's extremely rare that any cache line would survive between two reads from a given DMA buffer Hence no significant practical difference is expected with this patch. Signed-off-by: Eli Billauer <eli.billauer@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 3 additions and 1 deletions
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@ -509,7 +509,7 @@ static int xilly_setupchannels(struct xilly_endpoint *ep,
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channel->log2_element_size = ((format > 2) ?
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2 : format);
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bytebufsize = channel->rd_buf_size = bufsize *
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bytebufsize = bufsize *
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(1 << channel->log2_element_size);
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buffers = devm_kcalloc(dev, bufnum,
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@ -523,6 +523,7 @@ static int xilly_setupchannels(struct xilly_endpoint *ep,
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if (!is_writebuf) {
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channel->num_rd_buffers = bufnum;
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channel->rd_buf_size = bytebufsize;
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channel->rd_allow_partial = allowpartial;
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channel->rd_synchronous = synchronous;
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channel->rd_exclusive_open = exclusive_open;
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@ -533,6 +534,7 @@ static int xilly_setupchannels(struct xilly_endpoint *ep,
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bufnum, bytebufsize);
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} else if (channelnum > 0) {
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channel->num_wr_buffers = bufnum;
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channel->wr_buf_size = bytebufsize;
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channel->seekable = seekable;
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channel->wr_supports_nonempty = supports_nonempty;
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