dmaengine: vdma: Add clock support
Added basic clock support for axi dma's. The clocks are requested at probe and released at remove. Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Kedareswara rao Appana
Vinod Koul
parent
4ac4e12067
commit
ba16db36b5
1 changed files with 224 additions and 2 deletions
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@ -44,6 +44,7 @@
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include "../dmaengine.h"
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@ -344,6 +345,9 @@ struct xilinx_dma_chan {
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struct xilinx_dma_config {
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enum xdma_ip_type dmatype;
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int (*clk_init)(struct platform_device *pdev, struct clk **axi_clk,
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struct clk **tx_clk, struct clk **txs_clk,
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struct clk **rx_clk, struct clk **rxs_clk);
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};
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/**
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@ -355,7 +359,13 @@ struct xilinx_dma_config {
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* @has_sg: Specifies whether Scatter-Gather is present or not
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* @flush_on_fsync: Flush on frame sync
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* @ext_addr: Indicates 64 bit addressing is supported by dma device
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* @pdev: Platform device structure pointer
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* @dma_config: DMA config structure
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* @axi_clk: DMA Axi4-lite interace clock
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* @tx_clk: DMA mm2s clock
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* @txs_clk: DMA mm2s stream clock
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* @rx_clk: DMA s2mm clock
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* @rxs_clk: DMA s2mm stream clock
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*/
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struct xilinx_dma_device {
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void __iomem *regs;
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@ -365,7 +375,13 @@ struct xilinx_dma_device {
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bool has_sg;
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u32 flush_on_fsync;
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bool ext_addr;
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struct platform_device *pdev;
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const struct xilinx_dma_config *dma_config;
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struct clk *axi_clk;
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struct clk *tx_clk;
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struct clk *txs_clk;
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struct clk *rx_clk;
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struct clk *rxs_clk;
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};
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/* Macros */
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@ -1756,6 +1772,195 @@ static void xilinx_dma_chan_remove(struct xilinx_dma_chan *chan)
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list_del(&chan->common.device_node);
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}
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static int axidma_clk_init(struct platform_device *pdev, struct clk **axi_clk,
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struct clk **tx_clk, struct clk **rx_clk,
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struct clk **sg_clk, struct clk **tmp_clk)
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{
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int err;
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*tmp_clk = NULL;
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*axi_clk = devm_clk_get(&pdev->dev, "s_axi_lite_aclk");
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if (IS_ERR(*axi_clk)) {
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err = PTR_ERR(*axi_clk);
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dev_err(&pdev->dev, "failed to get axi_aclk (%u)\n", err);
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return err;
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}
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*tx_clk = devm_clk_get(&pdev->dev, "m_axi_mm2s_aclk");
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if (IS_ERR(*tx_clk))
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*tx_clk = NULL;
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*rx_clk = devm_clk_get(&pdev->dev, "m_axi_s2mm_aclk");
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if (IS_ERR(*rx_clk))
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*rx_clk = NULL;
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*sg_clk = devm_clk_get(&pdev->dev, "m_axi_sg_aclk");
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if (IS_ERR(*sg_clk))
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*sg_clk = NULL;
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err = clk_prepare_enable(*axi_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable axi_clk (%u)\n", err);
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return err;
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}
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err = clk_prepare_enable(*tx_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable tx_clk (%u)\n", err);
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goto err_disable_axiclk;
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}
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err = clk_prepare_enable(*rx_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable rx_clk (%u)\n", err);
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goto err_disable_txclk;
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}
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err = clk_prepare_enable(*sg_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable sg_clk (%u)\n", err);
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goto err_disable_rxclk;
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}
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return 0;
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err_disable_rxclk:
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clk_disable_unprepare(*rx_clk);
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err_disable_txclk:
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clk_disable_unprepare(*tx_clk);
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err_disable_axiclk:
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clk_disable_unprepare(*axi_clk);
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return err;
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}
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static int axicdma_clk_init(struct platform_device *pdev, struct clk **axi_clk,
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struct clk **dev_clk, struct clk **tmp_clk,
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struct clk **tmp1_clk, struct clk **tmp2_clk)
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{
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int err;
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*tmp_clk = NULL;
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*tmp1_clk = NULL;
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*tmp2_clk = NULL;
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*axi_clk = devm_clk_get(&pdev->dev, "s_axi_lite_aclk");
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if (IS_ERR(*axi_clk)) {
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err = PTR_ERR(*axi_clk);
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dev_err(&pdev->dev, "failed to get axi_clk (%u)\n", err);
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return err;
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}
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*dev_clk = devm_clk_get(&pdev->dev, "m_axi_aclk");
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if (IS_ERR(*dev_clk)) {
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err = PTR_ERR(*dev_clk);
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dev_err(&pdev->dev, "failed to get dev_clk (%u)\n", err);
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return err;
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}
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err = clk_prepare_enable(*axi_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable axi_clk (%u)\n", err);
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return err;
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}
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err = clk_prepare_enable(*dev_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable dev_clk (%u)\n", err);
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goto err_disable_axiclk;
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}
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return 0;
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err_disable_axiclk:
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clk_disable_unprepare(*axi_clk);
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return err;
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}
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static int axivdma_clk_init(struct platform_device *pdev, struct clk **axi_clk,
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struct clk **tx_clk, struct clk **txs_clk,
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struct clk **rx_clk, struct clk **rxs_clk)
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{
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int err;
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*axi_clk = devm_clk_get(&pdev->dev, "s_axi_lite_aclk");
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if (IS_ERR(*axi_clk)) {
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err = PTR_ERR(*axi_clk);
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dev_err(&pdev->dev, "failed to get axi_aclk (%u)\n", err);
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return err;
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}
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*tx_clk = devm_clk_get(&pdev->dev, "m_axi_mm2s_aclk");
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if (IS_ERR(*tx_clk))
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*tx_clk = NULL;
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*txs_clk = devm_clk_get(&pdev->dev, "m_axis_mm2s_aclk");
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if (IS_ERR(*txs_clk))
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*txs_clk = NULL;
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*rx_clk = devm_clk_get(&pdev->dev, "m_axi_s2mm_aclk");
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if (IS_ERR(*rx_clk))
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*rx_clk = NULL;
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*rxs_clk = devm_clk_get(&pdev->dev, "s_axis_s2mm_aclk");
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if (IS_ERR(*rxs_clk))
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*rxs_clk = NULL;
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err = clk_prepare_enable(*axi_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable axi_clk (%u)\n", err);
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return err;
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}
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err = clk_prepare_enable(*tx_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable tx_clk (%u)\n", err);
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goto err_disable_axiclk;
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}
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err = clk_prepare_enable(*txs_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable txs_clk (%u)\n", err);
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goto err_disable_txclk;
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}
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err = clk_prepare_enable(*rx_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable rx_clk (%u)\n", err);
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goto err_disable_txsclk;
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}
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err = clk_prepare_enable(*rxs_clk);
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if (err) {
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dev_err(&pdev->dev, "failed to enable rxs_clk (%u)\n", err);
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goto err_disable_rxclk;
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}
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return 0;
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err_disable_rxclk:
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clk_disable_unprepare(*rx_clk);
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err_disable_txsclk:
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clk_disable_unprepare(*txs_clk);
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err_disable_txclk:
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clk_disable_unprepare(*tx_clk);
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err_disable_axiclk:
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clk_disable_unprepare(*axi_clk);
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return err;
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}
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static void xdma_disable_allclks(struct xilinx_dma_device *xdev)
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{
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clk_disable_unprepare(xdev->rxs_clk);
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clk_disable_unprepare(xdev->rx_clk);
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clk_disable_unprepare(xdev->txs_clk);
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clk_disable_unprepare(xdev->tx_clk);
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clk_disable_unprepare(xdev->axi_clk);
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}
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/**
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* xilinx_dma_chan_probe - Per Channel Probing
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* It get channel features from the device tree entry and
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@ -1899,14 +2104,17 @@ static struct dma_chan *of_dma_xilinx_xlate(struct of_phandle_args *dma_spec,
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static const struct xilinx_dma_config axidma_config = {
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.dmatype = XDMA_TYPE_AXIDMA,
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.clk_init = axidma_clk_init,
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};
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static const struct xilinx_dma_config axicdma_config = {
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.dmatype = XDMA_TYPE_CDMA,
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.clk_init = axicdma_clk_init,
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};
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static const struct xilinx_dma_config axivdma_config = {
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.dmatype = XDMA_TYPE_VDMA,
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.clk_init = axivdma_clk_init,
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};
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static const struct of_device_id xilinx_dma_of_ids[] = {
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@ -1925,6 +2133,9 @@ MODULE_DEVICE_TABLE(of, xilinx_dma_of_ids);
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*/
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static int xilinx_dma_probe(struct platform_device *pdev)
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{
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int (*clk_init)(struct platform_device *, struct clk **, struct clk **,
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struct clk **, struct clk **, struct clk **)
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= axivdma_clk_init;
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struct device_node *node = pdev->dev.of_node;
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struct xilinx_dma_device *xdev;
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struct device_node *child, *np = pdev->dev.of_node;
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@ -1942,10 +2153,17 @@ static int xilinx_dma_probe(struct platform_device *pdev)
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const struct of_device_id *match;
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match = of_match_node(xilinx_dma_of_ids, np);
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if (match && match->data)
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if (match && match->data) {
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xdev->dma_config = match->data;
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clk_init = xdev->dma_config->clk_init;
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}
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}
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err = clk_init(pdev, &xdev->axi_clk, &xdev->tx_clk, &xdev->txs_clk,
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&xdev->rx_clk, &xdev->rxs_clk);
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if (err)
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return err;
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/* Request and map I/O memory */
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io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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xdev->regs = devm_ioremap_resource(&pdev->dev, io);
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@ -2018,7 +2236,7 @@ static int xilinx_dma_probe(struct platform_device *pdev)
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for_each_child_of_node(node, child) {
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err = xilinx_dma_chan_probe(xdev, child);
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if (err < 0)
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goto error;
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goto disable_clks;
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}
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if (xdev->dma_config->dmatype == XDMA_TYPE_VDMA) {
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@ -2042,6 +2260,8 @@ static int xilinx_dma_probe(struct platform_device *pdev)
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return 0;
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disable_clks:
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xdma_disable_allclks(xdev);
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error:
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for (i = 0; i < XILINX_DMA_MAX_CHANS_PER_DEVICE; i++)
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if (xdev->chan[i])
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@ -2069,6 +2289,8 @@ static int xilinx_dma_remove(struct platform_device *pdev)
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if (xdev->chan[i])
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xilinx_dma_chan_remove(xdev->chan[i]);
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xdma_disable_allclks(xdev);
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return 0;
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}
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