Merge "asoc: swr: Add new parameters for swr port"
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b94000b1af
2 changed files with 34 additions and 0 deletions
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@ -77,6 +77,8 @@ struct swr_port_info {
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u8 hstop;
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u8 blk_grp_count;
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u8 blk_pack_mode;
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u8 word_length;
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u8 lane_ctrl;
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u8 ch_en;
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u8 req_ch;
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u8 num_ch;
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@ -179,6 +179,30 @@
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#define SWRM_DP_PORT_CTRL_OFFSET1_SHFT 0x08
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#define SWRM_DP_PORT_CTRL_SAMPLE_INTERVAL 0x00
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#define SWRM_DP_PORT_CTRL_2_BANK(n, m) (SWRM_BASE_ADDRESS + \
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0x00001128 + \
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0x100*(n-1) + \
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0x40*m)
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#define SWRM_DP_BLOCK_CTRL_1(n) (SWRM_BASE_ADDRESS + \
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0x0000112C + 0x100*n)
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#define SWRM_DP_BLOCK_CTRL2_BANK(n, m) (SWRM_BASE_ADDRESS + \
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0x00001130 + \
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0x100*(n-1) + \
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0x40*m)
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#define SWRM_DP_PORT_HCTRL_BANK(n, m) (SWRM_BASE_ADDRESS + \
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0x00001134 + \
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0x100*(n-1) + \
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0x40*m)
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#define SWRM_DP_BLOCK_CTRL3_BANK(n, m) (SWRM_BASE_ADDRESS + \
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0x00001138 + \
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0x100*(n-1) + \
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0x40*m)
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#define SWRM_DIN_DPn_PCM_PORT_CTRL(n) (SWRM_BASE_ADDRESS + \
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0x00001054 + 0x100*n)
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@ -190,8 +214,14 @@
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#define SWRS_DP_REG_OFFSET(port, bank) ((0x100*port)+(0x10*bank))
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#define SWRS_SCP_CONTROL 0x44
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#define SWRS_DP_BLOCK_CONTROL_1(n) (SWRS_BASE_ADDRESS + 0x120 + \
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0x100 * n)
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#define SWRS_DP_CHANNEL_ENABLE_BANK(n, m) (SWRS_BASE_ADDRESS + 0x120 + \
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SWRS_DP_REG_OFFSET(n, m))
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#define SWRS_DP_BLOCK_CONTROL_2_BANK(n, m) (SWRS_BASE_ADDRESS + 0x121 + \
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SWRS_DP_REG_OFFSET(n, m))
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#define SWRS_DP_SAMPLE_CONTROL_1_BANK(n, m) (SWRS_BASE_ADDRESS + 0x122 + \
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SWRS_DP_REG_OFFSET(n, m))
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#define SWRS_DP_OFFSET_CONTROL_1_BANK(n, m) (SWRS_BASE_ADDRESS + 0x124 + \
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@ -202,6 +232,8 @@
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SWRS_DP_REG_OFFSET(n, m))
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#define SWRS_DP_BLOCK_CONTROL_3_BANK(n, m) (SWRS_BASE_ADDRESS + 0x127 + \
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SWRS_DP_REG_OFFSET(n, m))
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#define SWRS_DP_LANE_CONTROL_BANK(n, m) (SWRS_BASE_ADDRESS + 0x128 + \
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SWRS_DP_REG_OFFSET(n, m))
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#define SWRS_SCP_FRAME_CTRL_BANK(m) (SWRS_BASE_ADDRESS + 0x60 + \
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0x10*m)
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#define SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(m) (SWRS_BASE_ADDRESS + 0xE0 + \
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