[POWERPC] Celleb: interfaces to the hypervisor
This patch creates Celleb platform dependent files which add interfaces to call hypervisor. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Ishizaki Kou
Paul Mackerras
parent
c23ef29c1e
commit
b8a590c496
2 changed files with 507 additions and 0 deletions
220
arch/powerpc/platforms/celleb/beat_wrapper.h
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220
arch/powerpc/platforms/celleb/beat_wrapper.h
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@ -0,0 +1,220 @@
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/*
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* Beat hypervisor call I/F
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*
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* (C) Copyright 2007 TOSHIBA CORPORATION
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*
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* This code is based on arch/powerpc/platforms/pseries/plpar_wrapper.h.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#ifndef BEAT_HCALL
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#include "beat_syscall.h"
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/* defined in hvCall.S */
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extern s64 beat_hcall_norets(u64 opcode, ...);
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extern s64 beat_hcall_norets8(u64 opcode, u64 arg1, u64 arg2, u64 arg3,
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u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8);
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extern s64 beat_hcall1(u64 opcode, u64 retbuf[1], ...);
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extern s64 beat_hcall2(u64 opcode, u64 retbuf[2], ...);
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extern s64 beat_hcall3(u64 opcode, u64 retbuf[3], ...);
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extern s64 beat_hcall4(u64 opcode, u64 retbuf[4], ...);
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extern s64 beat_hcall5(u64 opcode, u64 retbuf[5], ...);
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extern s64 beat_hcall6(u64 opcode, u64 retbuf[6], ...);
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static inline s64 beat_downcount_of_interrupt(u64 plug_id)
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{
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return beat_hcall_norets(HV_downcount_of_interrupt, plug_id);
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}
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static inline s64 beat_set_interrupt_mask(u64 index,
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u64 val0, u64 val1, u64 val2, u64 val3)
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{
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return beat_hcall_norets(HV_set_interrupt_mask, index,
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val0, val1, val2, val3);
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}
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static inline s64 beat_destruct_irq_plug(u64 plug_id)
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{
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return beat_hcall_norets(HV_destruct_irq_plug, plug_id);
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}
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static inline s64 beat_construct_and_connect_irq_plug(u64 plug_id,
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u64 outlet_id)
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{
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return beat_hcall_norets(HV_construct_and_connect_irq_plug, plug_id,
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outlet_id);
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}
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static inline s64 beat_detect_pending_interrupts(u64 index, u64 *retbuf)
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{
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return beat_hcall4(HV_detect_pending_interrupts, retbuf, index);
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}
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static inline s64 beat_pause(u64 style)
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{
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return beat_hcall_norets(HV_pause, style);
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}
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static inline s64 beat_read_htab_entries(u64 htab_id, u64 index, u64 *retbuf)
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{
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return beat_hcall5(HV_read_htab_entries, retbuf, htab_id, index);
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}
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static inline s64 beat_insert_htab_entry(u64 htab_id, u64 group,
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u64 bitmask, u64 hpte_v, u64 hpte_r, u64 *slot)
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{
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u64 dummy[3];
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s64 ret;
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ret = beat_hcall3(HV_insert_htab_entry, dummy, htab_id, group,
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bitmask, hpte_v, hpte_r);
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*slot = dummy[0];
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return ret;
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}
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static inline s64 beat_write_htab_entry(u64 htab_id, u64 slot,
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u64 hpte_v, u64 hpte_r, u64 mask_v, u64 mask_r,
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u64 *ret_v, u64 *ret_r)
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{
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u64 dummy[2];
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s64 ret;
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ret = beat_hcall2(HV_write_htab_entry, dummy, htab_id, slot,
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hpte_v, hpte_r, mask_v, mask_r);
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*ret_v = dummy[0];
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*ret_r = dummy[1];
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return ret;
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}
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static inline void beat_shutdown_logical_partition(u64 code)
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{
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(void)beat_hcall_norets(HV_shutdown_logical_partition, code);
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}
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static inline s64 beat_rtc_write(u64 time_from_epoch)
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{
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return beat_hcall_norets(HV_rtc_write, time_from_epoch);
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}
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static inline s64 beat_rtc_read(u64 *time_from_epoch)
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{
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u64 dummy[1];
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s64 ret;
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ret = beat_hcall1(HV_rtc_read, dummy);
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*time_from_epoch = dummy[0];
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return ret;
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}
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#define BEAT_NVRW_CNT (sizeof(u64) * 6)
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static inline s64 beat_eeprom_write(u64 index, u64 length, u8 *buffer)
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{
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u64 b[6];
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if (length > BEAT_NVRW_CNT)
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return -1;
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memcpy(b, buffer, sizeof(b));
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return beat_hcall_norets8(HV_eeprom_write, index, length,
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b[0], b[1], b[2], b[3], b[4], b[5]);
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}
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static inline s64 beat_eeprom_read(u64 index, u64 length, u8 *buffer)
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{
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u64 b[6];
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s64 ret;
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if (length > BEAT_NVRW_CNT)
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return -1;
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ret = beat_hcall6(HV_eeprom_read, b, index, length);
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memcpy(buffer, b, length);
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return ret;
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}
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static inline s64 beat_set_dabr(u64 value, u64 style)
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{
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return beat_hcall_norets(HV_set_dabr, value, style);
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}
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static inline s64 beat_get_characters_from_console(u64 termno, u64 *len,
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u8 *buffer)
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{
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u64 dummy[3];
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s64 ret;
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ret = beat_hcall3(HV_get_characters_from_console, dummy, termno, len);
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*len = dummy[0];
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memcpy(buffer, dummy + 1, *len);
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return ret;
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}
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static inline s64 beat_put_characters_to_console(u64 termno, u64 len,
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u8 *buffer)
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{
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u64 b[2];
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memcpy(b, buffer, len);
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return beat_hcall_norets(HV_put_characters_to_console, termno, len, b[0], b[1]);
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}
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static inline s64 beat_get_spe_privileged_state_1_registers(
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u64 id, u64 offsetof, u64 *value)
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{
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u64 dummy[1];
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s64 ret;
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ret = beat_hcall1(HV_get_spe_privileged_state_1_registers, dummy, id,
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offsetof);
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*value = dummy[0];
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return ret;
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}
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static inline s64 beat_set_irq_mask_for_spe(u64 id, u64 class, u64 mask)
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{
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return beat_hcall_norets(HV_set_irq_mask_for_spe, id, class, mask);
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}
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static inline s64 beat_clear_interrupt_status_of_spe(u64 id, u64 class,
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u64 mask)
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{
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return beat_hcall_norets(HV_clear_interrupt_status_of_spe,
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id, class, mask);
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}
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static inline s64 beat_set_spe_privileged_state_1_registers(
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u64 id, u64 offsetof, u64 value)
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{
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return beat_hcall_norets(HV_set_spe_privileged_state_1_registers,
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id, offsetof, value);
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}
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static inline s64 beat_get_interrupt_status_of_spe(u64 id, u64 class, u64 *val)
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{
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u64 dummy[1];
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s64 ret;
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ret = beat_hcall1(HV_get_interrupt_status_of_spe, dummy, id, class);
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*val = dummy[0];
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return ret;
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}
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static inline s64 beat_put_iopte(u64 ioas_id, u64 io_addr, u64 real_addr,
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u64 ioid, u64 flags)
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{
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return beat_hcall_norets(HV_put_iopte, ioas_id, io_addr, real_addr,
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ioid, flags);
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}
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#endif
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287
arch/powerpc/platforms/celleb/hvCall.S
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287
arch/powerpc/platforms/celleb/hvCall.S
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@ -0,0 +1,287 @@
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/*
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* Beat hypervisor call I/F
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*
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* (C) Copyright 2007 TOSHIBA CORPORATION
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*
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* This code is based on arch/powerpc/platforms/pseries/hvCall.S.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <asm/ppc_asm.h>
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#define STK_PARM(i) (48 + ((i)-3)*8)
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/* Not implemented on Beat, now */
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#define HCALL_INST_PRECALL
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#define HCALL_INST_POSTCALL
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.text
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#define HVSC .long 0x44000022
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/* Note: takes only 7 input parameters at maximum */
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_GLOBAL(beat_hcall_norets)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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mr r11,r3
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mr r3,r4
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* Note: takes 8 input parameters at maximum */
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_GLOBAL(beat_hcall_norets8)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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mr r11,r3
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mr r3,r4
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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ld r10,STK_PARM(r10)(r1)
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* Note: takes only 6 input parameters, 1 output parameters at maximum */
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_GLOBAL(beat_hcall1)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* save ret buffer */
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mr r11,r3
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mr r3,r5
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mr r4,r6
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mr r5,r7
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mr r6,r8
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mr r7,r9
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mr r8,r10
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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ld r12,STK_PARM(r4)(r1)
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std r4, 0(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* Note: takes only 6 input parameters, 2 output parameters at maximum */
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_GLOBAL(beat_hcall2)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* save ret buffer */
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mr r11,r3
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mr r3,r5
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mr r4,r6
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mr r5,r7
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mr r6,r8
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mr r7,r9
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mr r8,r10
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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ld r12,STK_PARM(r4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* Note: takes only 6 input parameters, 3 output parameters at maximum */
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_GLOBAL(beat_hcall3)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* save ret buffer */
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mr r11,r3
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mr r3,r5
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mr r4,r6
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mr r5,r7
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mr r6,r8
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mr r7,r9
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mr r8,r10
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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ld r12,STK_PARM(r4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* Note: takes only 6 input parameters, 4 output parameters at maximum */
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_GLOBAL(beat_hcall4)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* save ret buffer */
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mr r11,r3
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mr r3,r5
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mr r4,r6
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mr r5,r7
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mr r6,r8
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mr r7,r9
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mr r8,r10
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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ld r12,STK_PARM(r4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* Note: takes only 6 input parameters, 5 output parameters at maximum */
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_GLOBAL(beat_hcall5)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* save ret buffer */
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mr r11,r3
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mr r3,r5
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mr r4,r6
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mr r5,r7
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mr r6,r8
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mr r7,r9
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mr r8,r10
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL
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ld r12,STK_PARM(r4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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std r8, 32(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* Note: takes only 6 input parameters, 6 output parameters at maximum */
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_GLOBAL(beat_hcall6)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL
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std r4,STK_PARM(r4)(r1) /* save ret buffer */
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mr r11,r3
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mr r3,r5
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mr r4,r6
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mr r5,r7
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mr r6,r8
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mr r7,r9
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mr r8,r10
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|
||||
HVSC /* invoke the hypervisor */
|
||||
|
||||
HCALL_INST_POSTCALL
|
||||
|
||||
ld r12,STK_PARM(r4)(r1)
|
||||
std r4, 0(r12)
|
||||
std r5, 8(r12)
|
||||
std r6, 16(r12)
|
||||
std r7, 24(r12)
|
||||
std r8, 32(r12)
|
||||
std r9, 40(r12)
|
||||
|
||||
lwz r0,8(r1)
|
||||
mtcrf 0xff,r0
|
||||
|
||||
blr /* return r3 = status */
|
||||
Loading…
Reference in a new issue