pciehp: Fix command write

Current implementation of pciehp_write_cmd() always enables command
completed interrupt. But pciehp_write_cmd() is also used for clearing
command completed interrupt enable bit. In this case, we must not set
the command completed interrupt enable bit. To fix this bug, this
patch add the check to see if caller wants to change command complete
interrupt enable bit.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by:  Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
Kenji Kaneshige 2008-04-25 14:39:14 -07:00 committed by Jesse Barnes
parent ef0ff95f13
commit b7aa1f1603

View file

@ -301,7 +301,10 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
}
slot_ctrl &= ~mask;
slot_ctrl |= ((cmd & mask) | CMD_CMPL_INTR_ENABLE);
slot_ctrl |= (cmd & mask);
/* Don't enable command completed if caller is changing it. */
if (!(mask & CMD_CMPL_INTR_ENABLE))
slot_ctrl |= CMD_CMPL_INTR_ENABLE;
ctrl->cmd_busy = 1;
smp_mb();