clk: sunxi: sun6i-apb0-gates: use bitmaps for valid gate indices
sun6i-apb0-gates uses the "clock-indices" DT property to indicate valid gate bits or holes in between. However, the rest of sunxi clock drivers use bitmaps for this purpose. This patch modifies sun6i-apb0-gates to use bitmaps as well, to be consistent with the sunxi platform. Also add the missing call to clk_register_clkdev, so system clock lookups will work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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1 changed files with 39 additions and 36 deletions
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@ -9,24 +9,48 @@
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*/
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#define SUN6I_APB0_GATES_MAX_SIZE 32
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struct gates_data {
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DECLARE_BITMAP(mask, SUN6I_APB0_GATES_MAX_SIZE);
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};
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static const struct gates_data sun6i_a31_apb0_gates __initconst = {
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.mask = {0x7F},
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};
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const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
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{ .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
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{ /* sentinel */ }
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};
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static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct clk_onecell_data *clk_data;
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const struct of_device_id *device;
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const struct gates_data *data;
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const char *clk_parent;
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const char *clk_name;
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struct resource *r;
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void __iomem *reg;
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int gate_id;
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int ngates;
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int gate_max = 0;
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int i;
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int j = 0;
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if (!np)
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return -ENODEV;
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device = of_match_device(sun6i_a31_apb0_gates_clk_dt_ids, &pdev->dev);
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if (!device)
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return -ENODEV;
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data = device->data;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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reg = devm_ioremap_resource(&pdev->dev, r);
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@ -37,57 +61,36 @@ static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
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if (!clk_parent)
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return -EINVAL;
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ngates = of_property_count_strings(np, "clock-output-names");
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if (ngates < 0)
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return ngates;
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if (!ngates || ngates > SUN6I_APB0_GATES_MAX_SIZE)
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return -EINVAL;
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clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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clk_data->clks = devm_kzalloc(&pdev->dev,
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SUN6I_APB0_GATES_MAX_SIZE *
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sizeof(struct clk *),
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GFP_KERNEL);
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/* Worst-case size approximation and memory allocation */
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ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
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clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
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sizeof(struct clk *), GFP_KERNEL);
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if (!clk_data->clks)
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return -ENOMEM;
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for (i = 0; i < ngates; i++) {
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for_each_set_bit(i, data->mask, SUN6I_APB0_GATES_MAX_SIZE) {
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of_property_read_string_index(np, "clock-output-names",
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i, &clk_name);
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j, &clk_name);
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gate_id = i;
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of_property_read_u32_index(np, "clock-indices", i, &gate_id);
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clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
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clk_parent, 0, reg, i,
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0, NULL);
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WARN_ON(IS_ERR(clk_data->clks[i]));
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clk_register_clkdev(clk_data->clks[i], clk_name, NULL);
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WARN_ON(gate_id >= SUN6I_APB0_GATES_MAX_SIZE);
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if (gate_id >= SUN6I_APB0_GATES_MAX_SIZE)
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continue;
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clk_data->clks[gate_id] = clk_register_gate(&pdev->dev,
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clk_name,
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clk_parent, 0,
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reg, gate_id,
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0, NULL);
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WARN_ON(IS_ERR(clk_data->clks[gate_id]));
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if (gate_id > gate_max)
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gate_max = gate_id;
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j++;
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}
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clk_data->clk_num = gate_max + 1;
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clk_data->clk_num = ngates + 1;
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return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
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}
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const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
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{ .compatible = "allwinner,sun6i-a31-apb0-gates-clk" },
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{ /* sentinel */ }
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};
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static struct platform_driver sun6i_a31_apb0_gates_clk_driver = {
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.driver = {
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.name = "sun6i-a31-apb0-gates-clk",
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