sh: clkfwk: Make recalc return an unsigned long.
This is prep work for cleaning up some of the rate propagation bits. Trivial conversion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
parent
ccc195655f
commit
b68d820143
23 changed files with 170 additions and 174 deletions
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@ -12,7 +12,7 @@ struct clk_ops {
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void (*init)(struct clk *clk);
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void (*enable)(struct clk *clk);
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void (*disable)(struct clk *clk);
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void (*recalc)(struct clk *clk);
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unsigned long (*recalc)(struct clk *clk);
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int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
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int (*set_parent)(struct clk *clk, struct clk *parent);
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long (*round_rate)(struct clk *clk, unsigned long rate);
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@ -96,4 +96,5 @@ enum clk_sh_algo_id {
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IP_N1,
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};
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#endif /* __ASM_SH_CLOCK_H */
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@ -75,6 +75,7 @@ static struct clk *onchip_clocks[] = {
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&cpu_clk,
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};
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/* Propagate rate to children */
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static void propagate_rate(struct clk *clk)
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{
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struct clk *clkp;
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@ -83,7 +84,7 @@ static void propagate_rate(struct clk *clk)
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if (likely(clkp->parent != clk))
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continue;
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if (likely(clkp->ops && clkp->ops->recalc))
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clkp->ops->recalc(clkp);
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clkp->rate = clkp->ops->recalc(clkp);
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if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
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propagate_rate(clkp);
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}
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@ -240,7 +241,7 @@ void clk_recalc_rate(struct clk *clk)
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unsigned long flags;
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spin_lock_irqsave(&clock_lock, flags);
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clk->ops->recalc(clk);
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clk->rate = clk->ops->recalc(clk);
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spin_unlock_irqrestore(&clock_lock, flags);
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}
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@ -377,20 +378,22 @@ static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
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switch (state.event) {
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case PM_EVENT_ON:
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/* Resumeing from hibernation */
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if (prev_state.event == PM_EVENT_FREEZE) {
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list_for_each_entry(clkp, &clock_list, node)
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if (likely(clkp->ops)) {
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unsigned long rate = clkp->rate;
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if (prev_state.event != PM_EVENT_FREEZE)
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break;
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if (likely(clkp->ops->set_parent))
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clkp->ops->set_parent(clkp,
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clkp->parent);
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if (likely(clkp->ops->set_rate))
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clkp->ops->set_rate(clkp,
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rate, NO_CHANGE);
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else if (likely(clkp->ops->recalc))
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clkp->ops->recalc(clkp);
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}
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list_for_each_entry(clkp, &clock_list, node) {
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if (likely(clkp->ops)) {
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unsigned long rate = clkp->rate;
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if (likely(clkp->ops->set_parent))
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clkp->ops->set_parent(clkp,
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clkp->parent);
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if (likely(clkp->ops->set_rate))
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clkp->ops->set_rate(clkp,
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rate, NO_CHANGE);
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else if (likely(clkp->ops->recalc))
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clkp->rate = clkp->ops->recalc(clkp);
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}
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}
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break;
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case PM_EVENT_FREEZE:
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@ -38,28 +38,28 @@ static struct clk_ops sh7619_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FREQCR) & 0x0007);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7619_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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clk->rate = clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
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return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
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}
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static struct clk_ops sh7619_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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clk->rate = clk->parent->rate;
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return clk->parent->rate;
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}
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static struct clk_ops sh7619_cpu_clk_ops = {
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@ -78,4 +78,3 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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if (idx < ARRAY_SIZE(sh7619_clk_ops))
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*ops = sh7619_clk_ops[idx];
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}
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@ -34,37 +34,37 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
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static void master_clk_init(struct clk *clk)
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{
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clk->rate = 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
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return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
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}
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static struct clk_ops sh7201_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FREQCR) & 0x0007);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7201_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FREQCR) & 0x0007);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7201_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
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clk->rate = clk->parent->rate / ifc_divisors[idx];
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh7201_cpu_clk_ops = {
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@ -46,29 +46,29 @@ static struct clk_ops sh7203_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FREQCR) & 0x0007);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7203_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FREQCR) & 0x0007);
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clk->rate = clk->parent->rate / pfc_divisors[idx-2];
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return clk->parent->rate / pfc_divisors[idx-2];
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}
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static struct clk_ops sh7203_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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clk->rate = clk->parent->rate;
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return clk->parent->rate;
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}
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static struct clk_ops sh7203_cpu_clk_ops = {
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@ -41,29 +41,29 @@ static struct clk_ops sh7206_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FREQCR) & 0x0007);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7206_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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clk->rate = clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
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return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
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}
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static struct clk_ops sh7206_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FREQCR) & 0x0007);
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clk->rate = clk->parent->rate / ifc_divisors[idx];
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh7206_cpu_clk_ops = {
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@ -38,36 +38,36 @@ static struct clk_ops sh3_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh3_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
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clk->rate = clk->parent->rate / stc_multipliers[idx];
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return clk->parent->rate / stc_multipliers[idx];
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}
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static struct clk_ops sh3_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
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clk->rate = clk->parent->rate / ifc_divisors[idx];
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh3_cpu_clk_ops = {
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@ -39,30 +39,30 @@ static struct clk_ops sh7705_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int idx = ctrl_inw(FRQCR) & 0x0003;
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7705_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8;
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clk->rate = clk->parent->rate / stc_multipliers[idx];
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return clk->parent->rate / stc_multipliers[idx];
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}
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static struct clk_ops sh7705_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4;
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clk->rate = clk->parent->rate / ifc_divisors[idx];
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh7705_cpu_clk_ops = {
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@ -34,36 +34,36 @@ static struct clk_ops sh7706_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7706_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
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clk->rate = clk->parent->rate / stc_multipliers[idx];
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return clk->parent->rate / stc_multipliers[idx];
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}
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static struct clk_ops sh7706_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
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clk->rate = clk->parent->rate / ifc_divisors[idx];
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh7706_cpu_clk_ops = {
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@ -41,12 +41,12 @@ static struct clk_ops sh7709_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
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clk->rate = clk->parent->rate / pfc_divisors[idx];
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return clk->parent->rate / pfc_divisors[idx];
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}
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static struct clk_ops sh7709_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = (frqcr & 0x0080) ?
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((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
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clk->rate = clk->parent->rate * stc_multipliers[idx];
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return clk->parent->rate * stc_multipliers[idx];
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}
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static struct clk_ops sh7709_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
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static unsigned long cpu_clk_recalc(struct clk *clk)
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{
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int frqcr = ctrl_inw(FRQCR);
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int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
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clk->rate = clk->parent->rate / ifc_divisors[idx];
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return clk->parent->rate / ifc_divisors[idx];
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}
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static struct clk_ops sh7709_cpu_clk_ops = {
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@ -33,30 +33,30 @@ static struct clk_ops sh7710_master_clk_ops = {
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.init = master_clk_init,
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};
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static void module_clk_recalc(struct clk *clk)
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static unsigned long module_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FRQCR) & 0x0007);
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clk->rate = clk->parent->rate / md_table[idx];
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return clk->parent->rate / md_table[idx];
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}
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static struct clk_ops sh7710_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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static void bus_clk_recalc(struct clk *clk)
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static unsigned long bus_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8;
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clk->rate = clk->parent->rate / md_table[idx];
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return clk->parent->rate / md_table[idx];
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}
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static struct clk_ops sh7710_bus_clk_ops = {
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4;
|
||||
clk->rate = clk->parent->rate / md_table[idx];
|
||||
return clk->parent->rate / md_table[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7710_cpu_clk_ops = {
|
||||
|
|
|
@ -33,24 +33,24 @@ static struct clk_ops sh7712_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int frqcr = ctrl_inw(FRQCR);
|
||||
int idx = frqcr & 0x0007;
|
||||
|
||||
clk->rate = clk->parent->rate / divisors[idx];
|
||||
return clk->parent->rate / divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7712_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int frqcr = ctrl_inw(FRQCR);
|
||||
int idx = (frqcr & 0x0030) >> 4;
|
||||
|
||||
clk->rate = clk->parent->rate / divisors[idx];
|
||||
return clk->parent->rate / divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7712_cpu_clk_ops = {
|
||||
|
|
|
@ -21,10 +21,10 @@
|
|||
static int frqcr3_divisors[] = { 1, 2, 3, 4, 6, 8, 16 };
|
||||
static int frqcr3_values[] = { 0, 1, 2, 3, 4, 5, 6 };
|
||||
|
||||
static void emi_clk_recalc(struct clk *clk)
|
||||
static unsigned long emi_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007;
|
||||
clk->rate = clk->parent->rate / frqcr3_divisors[idx];
|
||||
return clk->parent->rate / frqcr3_divisors[idx];
|
||||
}
|
||||
|
||||
static inline int frqcr3_lookup(struct clk *clk, unsigned long rate)
|
||||
|
@ -50,10 +50,10 @@ static struct clk sh4202_emi_clk = {
|
|||
.ops = &sh4202_emi_clk_ops,
|
||||
};
|
||||
|
||||
static void femi_clk_recalc(struct clk *clk)
|
||||
static unsigned long femi_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007;
|
||||
clk->rate = clk->parent->rate / frqcr3_divisors[idx];
|
||||
return clk->parent->rate / frqcr3_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh4202_femi_clk_ops = {
|
||||
|
@ -90,10 +90,10 @@ static void shoc_clk_init(struct clk *clk)
|
|||
WARN_ON(i == ARRAY_SIZE(frqcr3_divisors)); /* Undefined clock */
|
||||
}
|
||||
|
||||
static void shoc_clk_recalc(struct clk *clk)
|
||||
static unsigned long shoc_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007;
|
||||
clk->rate = clk->parent->rate / frqcr3_divisors[idx];
|
||||
return clk->parent->rate / frqcr3_divisors[idx];
|
||||
}
|
||||
|
||||
static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
|
||||
|
@ -127,7 +127,7 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
|
|||
frqcr3 |= tmp << 6;
|
||||
ctrl_outl(frqcr3, CPG2_FRQCR3);
|
||||
|
||||
clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
|
||||
return clk->parent->rate / frqcr3_divisors[tmp];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -35,30 +35,30 @@ static struct clk_ops sh4_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inw(FRQCR) & 0x0007);
|
||||
clk->rate = clk->parent->rate / pfc_divisors[idx];
|
||||
return clk->parent->rate / pfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh4_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007;
|
||||
clk->rate = clk->parent->rate / bfc_divisors[idx];
|
||||
return clk->parent->rate / bfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh4_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007;
|
||||
clk->rate = clk->parent->rate / ifc_divisors[idx];
|
||||
return clk->parent->rate / ifc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh4_cpu_clk_ops = {
|
||||
|
|
|
@ -151,11 +151,11 @@ static int divisors2[] = { 4, 1, 8, 12, 16, 24, 32, 1, 48, 64, 72, 96, 1, 144 };
|
|||
static int divisors2[] = { 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40 };
|
||||
#endif
|
||||
|
||||
static void master_clk_recalc(struct clk *clk)
|
||||
static unsigned long master_clk_recalc(struct clk *clk)
|
||||
{
|
||||
unsigned frqcr = ctrl_inl(FRQCR);
|
||||
|
||||
clk->rate = CONFIG_SH_PCLK_FREQ * STCPLL(frqcr);
|
||||
return CONFIG_SH_PCLK_FREQ * STCPLL(frqcr);
|
||||
}
|
||||
|
||||
static void master_clk_init(struct clk *clk)
|
||||
|
@ -166,12 +166,11 @@ static void master_clk_init(struct clk *clk)
|
|||
master_clk_recalc(clk);
|
||||
}
|
||||
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
unsigned long frqcr = ctrl_inl(FRQCR);
|
||||
|
||||
clk->rate = clk->parent->rate / STCPLL(frqcr);
|
||||
return clk->parent->rate / STCPLL(frqcr);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7724)
|
||||
|
@ -283,14 +282,14 @@ static int sh7722_find_div_index(unsigned long parent_rate, unsigned rate)
|
|||
return index;
|
||||
}
|
||||
|
||||
static void sh7722_frqcr_recalc(struct clk *clk)
|
||||
static unsigned long sh7722_frqcr_recalc(struct clk *clk)
|
||||
{
|
||||
struct frqcr_context ctx = sh7722_get_clk_context(clk->name);
|
||||
unsigned long frqcr = ctrl_inl(FRQCR);
|
||||
int index;
|
||||
|
||||
index = (frqcr >> ctx.shift) & ctx.mask;
|
||||
clk->rate = clk->parent->rate * 2 / divisors2[index];
|
||||
return clk->parent->rate * 2 / divisors2[index];
|
||||
}
|
||||
|
||||
static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate,
|
||||
|
@ -439,11 +438,8 @@ static struct clk_ops sh7722_frqcr_clk_ops = {
|
|||
|
||||
/*
|
||||
* clock ops methods for SIU A/B and IrDA clock
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_CPU_SUBTYPE_SH7343
|
||||
|
||||
static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
|
||||
{
|
||||
unsigned long r;
|
||||
|
@ -458,12 +454,12 @@ static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void sh7722_siu_recalc(struct clk *clk)
|
||||
static unsigned long sh7722_siu_recalc(struct clk *clk)
|
||||
{
|
||||
unsigned long r;
|
||||
|
||||
r = ctrl_inl(clk->arch_flags);
|
||||
clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
|
||||
return clk->parent->rate * 2 / divisors2[r & 0xF];
|
||||
}
|
||||
|
||||
static int sh7722_siu_start_stop(struct clk *clk, int enable)
|
||||
|
@ -525,12 +521,12 @@ static int sh7722_video_set_rate(struct clk *clk, unsigned long rate,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void sh7722_video_recalc(struct clk *clk)
|
||||
static unsigned long sh7722_video_recalc(struct clk *clk)
|
||||
{
|
||||
unsigned long r;
|
||||
|
||||
r = ctrl_inl(VCLKCR);
|
||||
clk->rate = clk->parent->rate / ((r & 0x3F) + 1);
|
||||
return clk->parent->rate / ((r & 0x3F) + 1);
|
||||
}
|
||||
|
||||
static struct clk_ops sh7722_video_clk_ops = {
|
||||
|
@ -627,7 +623,7 @@ static int sh7722_mstpcr_start_stop(struct clk *clk, int enable)
|
|||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
r = ctrl_inl(reg);
|
||||
|
||||
|
@ -650,10 +646,9 @@ static void sh7722_mstpcr_disable(struct clk *clk)
|
|||
sh7722_mstpcr_start_stop(clk, 0);
|
||||
}
|
||||
|
||||
static void sh7722_mstpcr_recalc(struct clk *clk)
|
||||
static unsigned long sh7722_mstpcr_recalc(struct clk *clk)
|
||||
{
|
||||
if (clk->parent)
|
||||
clk->rate = clk->parent->rate;
|
||||
return clk->parent->rate;
|
||||
}
|
||||
|
||||
static struct clk_ops sh7722_mstpcr_clk_ops = {
|
||||
|
|
|
@ -29,29 +29,29 @@ static struct clk_ops sh7763_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07);
|
||||
clk->rate = clk->parent->rate / p0fc_divisors[idx];
|
||||
return clk->parent->rate / p0fc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7763_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07);
|
||||
clk->rate = clk->parent->rate / bfc_divisors[idx];
|
||||
return clk->parent->rate / bfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7763_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
clk->rate = clk->parent->rate;
|
||||
return clk->parent->rate;
|
||||
}
|
||||
|
||||
static struct clk_ops sh7763_cpu_clk_ops = {
|
||||
|
@ -71,10 +71,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
|
|||
*ops = sh7763_clk_ops[idx];
|
||||
}
|
||||
|
||||
static void shyway_clk_recalc(struct clk *clk)
|
||||
static unsigned long shyway_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07);
|
||||
clk->rate = clk->parent->rate / cfc_divisors[idx];
|
||||
return clk->parent->rate / cfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7763_shyway_clk_ops = {
|
||||
|
|
|
@ -28,30 +28,30 @@ static struct clk_ops sh7770_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f);
|
||||
clk->rate = clk->parent->rate / pfc_divisors[idx];
|
||||
return clk->parent->rate / pfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7770_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inl(FRQCR) & 0x000f);
|
||||
clk->rate = clk->parent->rate / bfc_divisors[idx];
|
||||
return clk->parent->rate / bfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7770_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f);
|
||||
clk->rate = clk->parent->rate / ifc_divisors[idx];
|
||||
return clk->parent->rate / ifc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7770_cpu_clk_ops = {
|
||||
|
|
|
@ -29,30 +29,30 @@ static struct clk_ops sh7780_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inl(FRQCR) & 0x0003);
|
||||
clk->rate = clk->parent->rate / pfc_divisors[idx];
|
||||
return clk->parent->rate / pfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7780_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007);
|
||||
clk->rate = clk->parent->rate / bfc_divisors[idx];
|
||||
return clk->parent->rate / bfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7780_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001);
|
||||
clk->rate = clk->parent->rate / ifc_divisors[idx];
|
||||
return clk->parent->rate / ifc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7780_cpu_clk_ops = {
|
||||
|
@ -72,10 +72,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
|
|||
*ops = sh7780_clk_ops[idx];
|
||||
}
|
||||
|
||||
static void shyway_clk_recalc(struct clk *clk)
|
||||
static unsigned long shyway_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007);
|
||||
clk->rate = clk->parent->rate / cfc_divisors[idx];
|
||||
return clk->parent->rate / cfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7780_shyway_clk_ops = {
|
||||
|
|
|
@ -33,30 +33,30 @@ static struct clk_ops sh7785_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inl(FRQMR1) & 0x000f);
|
||||
clk->rate = clk->parent->rate / pfc_divisors[idx];
|
||||
return clk->parent->rate / pfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7785_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
|
||||
clk->rate = clk->parent->rate / bfc_divisors[idx];
|
||||
return clk->parent->rate / bfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7785_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
|
||||
clk->rate = clk->parent->rate / ifc_divisors[idx];
|
||||
return clk->parent->rate / ifc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7785_cpu_clk_ops = {
|
||||
|
@ -76,10 +76,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
|
|||
*ops = sh7785_clk_ops[idx];
|
||||
}
|
||||
|
||||
static void shyway_clk_recalc(struct clk *clk)
|
||||
static unsigned long shyway_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
|
||||
clk->rate = clk->parent->rate / sfc_divisors[idx];
|
||||
return clk->parent->rate / sfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7785_shyway_clk_ops = {
|
||||
|
@ -92,10 +92,10 @@ static struct clk sh7785_shyway_clk = {
|
|||
.ops = &sh7785_shyway_clk_ops,
|
||||
};
|
||||
|
||||
static void ddr_clk_recalc(struct clk *clk)
|
||||
static unsigned long ddr_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
|
||||
clk->rate = clk->parent->rate / mfc_divisors[idx];
|
||||
return clk->parent->rate / mfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7785_ddr_clk_ops = {
|
||||
|
@ -108,10 +108,10 @@ static struct clk sh7785_ddr_clk = {
|
|||
.ops = &sh7785_ddr_clk_ops,
|
||||
};
|
||||
|
||||
static void ram_clk_recalc(struct clk *clk)
|
||||
static unsigned long ram_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 24) & 0x0003);
|
||||
clk->rate = clk->parent->rate / ufc_divisors[idx];
|
||||
return clk->parent->rate / ufc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7785_ram_clk_ops = {
|
||||
|
|
|
@ -36,30 +36,30 @@ static struct clk_ops sh7786_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inl(FRQMR1) & 0x000f);
|
||||
clk->rate = clk->parent->rate / pfc_divisors[idx];
|
||||
return clk->parent->rate / pfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7786_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
|
||||
clk->rate = clk->parent->rate / bfc_divisors[idx];
|
||||
return clk->parent->rate / bfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7786_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
|
||||
clk->rate = clk->parent->rate / ifc_divisors[idx];
|
||||
return clk->parent->rate / ifc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7786_cpu_clk_ops = {
|
||||
|
@ -79,10 +79,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
|
|||
*ops = sh7786_clk_ops[idx];
|
||||
}
|
||||
|
||||
static void shyway_clk_recalc(struct clk *clk)
|
||||
static unsigned long shyway_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
|
||||
clk->rate = clk->parent->rate / sfc_divisors[idx];
|
||||
return clk->parent->rate / sfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7786_shyway_clk_ops = {
|
||||
|
@ -95,10 +95,10 @@ static struct clk sh7786_shyway_clk = {
|
|||
.ops = &sh7786_shyway_clk_ops,
|
||||
};
|
||||
|
||||
static void ddr_clk_recalc(struct clk *clk)
|
||||
static unsigned long ddr_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
|
||||
clk->rate = clk->parent->rate / mfc_divisors[idx];
|
||||
return clk->parent->rate / mfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh7786_ddr_clk_ops = {
|
||||
|
|
|
@ -40,30 +40,30 @@ static struct clk_ops shx3_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK);
|
||||
clk->rate = clk->parent->rate / pfc_divisors[idx];
|
||||
return clk->parent->rate / pfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops shx3_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> BFC_POS) & BFC_MSK);
|
||||
clk->rate = clk->parent->rate / bfc_divisors[idx];
|
||||
return clk->parent->rate / bfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops shx3_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> IFC_POS) & IFC_MSK);
|
||||
clk->rate = clk->parent->rate / ifc_divisors[idx];
|
||||
return clk->parent->rate / ifc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops shx3_cpu_clk_ops = {
|
||||
|
@ -83,10 +83,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
|
|||
*ops = shx3_clk_ops[idx];
|
||||
}
|
||||
|
||||
static void shyway_clk_recalc(struct clk *clk)
|
||||
static unsigned long shyway_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = ((ctrl_inl(FRQCR) >> CFC_POS) & CFC_MSK);
|
||||
clk->rate = clk->parent->rate / cfc_divisors[idx];
|
||||
return clk->parent->rate / cfc_divisors[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops shx3_shyway_clk_ops = {
|
||||
|
|
|
@ -32,30 +32,30 @@ static struct clk_ops sh5_master_clk_ops = {
|
|||
.init = master_clk_init,
|
||||
};
|
||||
|
||||
static void module_clk_recalc(struct clk *clk)
|
||||
static unsigned long module_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inw(cprc_base) >> 12) & 0x0007;
|
||||
clk->rate = clk->parent->rate / ifc_table[idx];
|
||||
return clk->parent->rate / ifc_table[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh5_module_clk_ops = {
|
||||
.recalc = module_clk_recalc,
|
||||
};
|
||||
|
||||
static void bus_clk_recalc(struct clk *clk)
|
||||
static unsigned long bus_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inw(cprc_base) >> 3) & 0x0007;
|
||||
clk->rate = clk->parent->rate / ifc_table[idx];
|
||||
return clk->parent->rate / ifc_table[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh5_bus_clk_ops = {
|
||||
.recalc = bus_clk_recalc,
|
||||
};
|
||||
|
||||
static void cpu_clk_recalc(struct clk *clk)
|
||||
static unsigned long cpu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int idx = (ctrl_inw(cprc_base) & 0x0007);
|
||||
clk->rate = clk->parent->rate / ifc_table[idx];
|
||||
return clk->parent->rate / ifc_table[idx];
|
||||
}
|
||||
|
||||
static struct clk_ops sh5_cpu_clk_ops = {
|
||||
|
|
|
@ -172,22 +172,19 @@ static void __init tmu_clk_init(struct clk *clk)
|
|||
clk->rate = clk_get_rate(clk->parent) / (4 << (divisor << 1));
|
||||
}
|
||||
|
||||
static void tmu_clk_recalc(struct clk *clk)
|
||||
static unsigned long tmu_clk_recalc(struct clk *clk)
|
||||
{
|
||||
int tmu_num = clk->name[3]-'0';
|
||||
unsigned long prev_rate = clk_get_rate(clk);
|
||||
unsigned long new_rate;
|
||||
unsigned long flags;
|
||||
u8 divisor = ctrl_inw(TMU0_TCR+tmu_num*0xC) & 0x7;
|
||||
clk->rate = clk_get_rate(clk->parent) / (4 << (divisor << 1));
|
||||
|
||||
if(prev_rate==clk_get_rate(clk))
|
||||
return;
|
||||
|
||||
if(tmu_num)
|
||||
return; /* No more work on TMU1 */
|
||||
new_rate = clk_get_rate(clk->parent) / (4 << (divisor << 1));
|
||||
if (clk->rate == new_rate || tmu_num)
|
||||
return clk->rate; /* No more work on TMU1 */
|
||||
|
||||
local_irq_save(flags);
|
||||
tmus_are_scaled = (prev_rate > clk->rate);
|
||||
tmus_are_scaled = (clk->rate > new_rate);
|
||||
|
||||
_tmu_stop(TMU0);
|
||||
|
||||
|
@ -210,6 +207,7 @@ static void tmu_clk_recalc(struct clk *clk)
|
|||
_tmu_start(TMU0);
|
||||
|
||||
local_irq_restore(flags);
|
||||
return new_rate;
|
||||
}
|
||||
|
||||
static struct clk_ops tmu_clk_ops = {
|
||||
|
|
Loading…
Reference in a new issue