Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

ARM: mvebu: Fix bug in coherency fabric low level init function

Browse source 
When adding CPU to the SMP group and enabling the coherency on this
CPU we must protect the register access.
The previous implementation claims to be atomic but doesn't provide
any protection against parallel access to the coherency fabric control
and configuration registers.

This patch fixes this by using the ldrex and strex mechanism.
This method should be used in all accesses to those registers.

[gregory.clement@free-electrons.com: fixed the commit's topic]
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Nadav Haklai 2013-05-23 10:54:02 +02:00 committed by Jason Cooper
parent e89b405809
commit b60b61d412
1 changed files with 11 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
arch/arm/mach-mvebu/coherency_ll.S
View file

@ -32,15 +32,21 @@ ENTRY(ll_set_cpu_coherent)
/* Add CPU to SMP group - Atomic */
add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
ldr r2, [r3]
1:
ldrex r2, [r3]
orr r2, r2, r1
str r2, [r3]
strex r0, r2, [r3]
cmp r0, #0
bne 1b
/* Enable coherency on CPU - Atomic */
add r3, r0, #ARMADA_XP_CFB_CFG_REG_OFFSET
ldr r2, [r3]
add r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET
1:
ldrex r2, [r3]
orr r2, r2, r1
str r2, [r3]
strex r0, r2, [r3]
cmp r0, #0
bne 1b
dsb