USB: xhci: Bulk transfer support
Allow device drivers to submit URBs to bulk endpoints on devices under an xHCI host controller. Share code between the control and bulk enqueueing functions when it makes sense. To get the best performance out of bulk transfers, SuperSpeed devices must have the bMaxBurst size copied from their endpoint companion controller into the xHCI device context. This allows the host controller to "burst" up to 16 packets before it has to wait for the device to acknowledge the first packet. The buffers in Transfer Request Blocks (TRBs) can cross page boundaries, but they cannot cross 64KB boundaries. The buffer must be broken into multiple TRBs if a 64KB boundary is crossed. The sum of buffer lengths in all the TRBs in a Transfer Descriptor (TD) cannot exceed 64MB. To work around this, the enqueueing code must enqueue multiple TDs. The transfer event handler may incorrectly give back the URB in this case, if it gets a transfer event that points somewhere in the first TD. FIXME later. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Sarah Sharp
Greg Kroah-Hartman
parent
f94e018631
commit
b10de14211
4 changed files with 253 additions and 36 deletions
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@ -589,12 +589,6 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
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slot_id = urb->dev->slot_id;
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ep_index = xhci_get_endpoint_index(&urb->ep->desc);
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/* Only support ep 0 control transfers for now */
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if (ep_index != 0) {
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xhci_dbg(xhci, "WARN: urb submitted to unsupported ep %x\n",
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urb->ep->desc.bEndpointAddress);
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return -ENOSYS;
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}
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spin_lock_irqsave(&xhci->lock, flags);
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if (!xhci->devs || !xhci->devs[slot_id]) {
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@ -608,7 +602,12 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
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ret = -ESHUTDOWN;
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goto exit;
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}
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ret = queue_ctrl_tx(xhci, mem_flags, urb, slot_id, ep_index);
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if (usb_endpoint_xfer_control(&urb->ep->desc))
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ret = queue_ctrl_tx(xhci, mem_flags, urb, slot_id, ep_index);
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else if (usb_endpoint_xfer_bulk(&urb->ep->desc))
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ret = queue_bulk_tx(xhci, mem_flags, urb, slot_id, ep_index);
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else
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ret = -EINVAL;
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exit:
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spin_unlock_irqrestore(&xhci->lock, flags);
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return ret;
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@ -494,7 +494,9 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
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case USB_SPEED_SUPER:
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max_packet = ep->desc.wMaxPacketSize;
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ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
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/* FIXME dig out burst from ep companion desc */
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/* dig out max burst from ep companion desc */
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max_packet = ep->ep_comp->desc.bMaxBurst;
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ep_ctx->ep_info2 |= MAX_BURST(max_packet);
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break;
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case USB_SPEED_HIGH:
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/* bits 11:12 specify the number of additional transaction
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@ -395,7 +395,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
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dma_addr_t event_dma;
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struct xhci_segment *event_seg;
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union xhci_trb *event_trb;
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struct urb *urb = NULL;
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struct urb *urb;
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int status = -EINPROGRESS;
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xdev = xhci->devs[TRB_TO_SLOT_ID(event->flags)];
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@ -437,7 +437,46 @@ static int handle_tx_event(struct xhci_hcd *xhci,
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return -ESHUTDOWN;
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}
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event_trb = &event_seg->trbs[(event_dma - event_seg->dma) / sizeof(*event_trb)];
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xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
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(unsigned int) (event->flags & TRB_TYPE_BITMASK)>>10);
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xhci_dbg(xhci, "Offset 0x00 (buffer[0]) = 0x%x\n",
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(unsigned int) event->buffer[0]);
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xhci_dbg(xhci, "Offset 0x04 (buffer[0]) = 0x%x\n",
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(unsigned int) event->buffer[1]);
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xhci_dbg(xhci, "Offset 0x08 (transfer length) = 0x%x\n",
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(unsigned int) event->transfer_len);
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xhci_dbg(xhci, "Offset 0x0C (flags) = 0x%x\n",
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(unsigned int) event->flags);
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/* Look for common error cases */
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switch (GET_COMP_CODE(event->transfer_len)) {
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/* Skip codes that require special handling depending on
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* transfer type
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*/
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case COMP_SUCCESS:
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case COMP_SHORT_TX:
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break;
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case COMP_STALL:
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xhci_warn(xhci, "WARN: Stalled endpoint\n");
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status = -EPIPE;
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break;
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case COMP_TRB_ERR:
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xhci_warn(xhci, "WARN: TRB error on endpoint\n");
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status = -EILSEQ;
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break;
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case COMP_TX_ERR:
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xhci_warn(xhci, "WARN: transfer error on endpoint\n");
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status = -EPROTO;
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break;
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case COMP_DB_ERR:
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xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
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status = -ENOSR;
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break;
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default:
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xhci_warn(xhci, "ERROR Unknown event condition, HC probably busted\n");
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urb = NULL;
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goto cleanup;
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}
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/* Now update the urb's actual_length and give back to the core */
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/* Was this a control transfer? */
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if (usb_endpoint_xfer_control(&td->urb->ep->desc)) {
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@ -459,25 +498,9 @@ static int handle_tx_event(struct xhci_hcd *xhci,
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xhci_warn(xhci, "WARN: short transfer on control ep\n");
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status = -EREMOTEIO;
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break;
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case COMP_STALL:
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xhci_warn(xhci, "WARN: Stalled control ep\n");
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status = -EPIPE;
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break;
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case COMP_TRB_ERR:
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xhci_warn(xhci, "WARN: TRB error on control ep\n");
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status = -EILSEQ;
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break;
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case COMP_TX_ERR:
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xhci_warn(xhci, "WARN: transfer error on control ep\n");
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status = -EPROTO;
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break;
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case COMP_DB_ERR:
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xhci_warn(xhci, "WARN: HC couldn't access mem fast enough on control TX\n");
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status = -ENOSR;
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break;
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default:
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xhci_dbg(xhci, "ERROR Unknown event condition, HC probably busted\n");
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goto cleanup;
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/* Others already handled above */
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break;
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}
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/*
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* Did we transfer any data, despite the errors that might have
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@ -493,21 +516,90 @@ static int handle_tx_event(struct xhci_hcd *xhci,
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TRB_LEN(event->transfer_len);
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}
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}
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while (ep_ring->dequeue != td->last_trb)
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inc_deq(xhci, ep_ring, false);
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inc_deq(xhci, ep_ring, false);
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/* Clean up the endpoint's TD list */
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urb = td->urb;
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list_del(&td->td_list);
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kfree(td);
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} else {
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xhci_dbg(xhci, "FIXME do something for non-control transfers\n");
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switch (GET_COMP_CODE(event->transfer_len)) {
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case COMP_SUCCESS:
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/* Double check that the HW transferred everything. */
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if (event_trb != td->last_trb) {
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xhci_warn(xhci, "WARN Successful completion "
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"on short TX\n");
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if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
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status = -EREMOTEIO;
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else
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status = 0;
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} else {
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xhci_dbg(xhci, "Successful bulk transfer!\n");
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status = 0;
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}
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break;
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case COMP_SHORT_TX:
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if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
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status = -EREMOTEIO;
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else
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status = 0;
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break;
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default:
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/* Others already handled above */
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break;
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}
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dev_dbg(&td->urb->dev->dev,
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"ep %#x - asked for %d bytes, "
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"%d bytes untransferred\n",
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td->urb->ep->desc.bEndpointAddress,
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td->urb->transfer_buffer_length,
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TRB_LEN(event->transfer_len));
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/* Fast path - was this the last TRB in the TD for this URB? */
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if (event_trb == td->last_trb) {
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if (TRB_LEN(event->transfer_len) != 0) {
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td->urb->actual_length =
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td->urb->transfer_buffer_length -
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TRB_LEN(event->transfer_len);
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if (td->urb->actual_length < 0) {
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xhci_warn(xhci, "HC gave bad length "
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"of %d bytes left\n",
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TRB_LEN(event->transfer_len));
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td->urb->actual_length = 0;
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}
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if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
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status = -EREMOTEIO;
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else
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status = 0;
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} else {
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td->urb->actual_length = td->urb->transfer_buffer_length;
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/* Ignore a short packet completion if the
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* untransferred length was zero.
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*/
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status = 0;
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}
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} else {
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/* Slow path - walk the list, starting from the first
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* TRB to get the actual length transferred
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*/
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td->urb->actual_length = 0;
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while (ep_ring->dequeue != event_trb) {
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td->urb->actual_length += TRB_LEN(ep_ring->dequeue->generic.field[2]);
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inc_deq(xhci, ep_ring, false);
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}
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td->urb->actual_length += TRB_LEN(ep_ring->dequeue->generic.field[2]) -
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TRB_LEN(event->transfer_len);
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}
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}
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/* Update ring dequeue pointer */
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while (ep_ring->dequeue != td->last_trb)
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inc_deq(xhci, ep_ring, false);
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inc_deq(xhci, ep_ring, false);
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/* Clean up the endpoint's TD list */
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urb = td->urb;
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list_del(&td->td_list);
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kfree(td);
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urb->hcpriv = NULL;
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cleanup:
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inc_deq(xhci, xhci->event_ring, true);
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set_hc_event_deq(xhci);
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/* FIXME for multi-TD URBs (who have buffers bigger than 64MB) */
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if (urb) {
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usb_hcd_unlink_urb_from_ep(xhci_to_hcd(xhci), urb);
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spin_unlock(&xhci->lock);
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@ -666,6 +758,126 @@ int xhci_prepare_transfer(struct xhci_hcd *xhci,
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return 0;
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}
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/* This is very similar to what ehci-q.c qtd_fill() does */
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int queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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struct urb *urb, int slot_id, unsigned int ep_index)
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{
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struct xhci_ring *ep_ring;
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struct xhci_td *td;
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int num_trbs;
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struct xhci_generic_trb *start_trb;
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bool first_trb;
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int start_cycle;
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u32 field;
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int running_total, trb_buff_len, ret;
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u64 addr;
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ep_ring = xhci->devs[slot_id]->ep_rings[ep_index];
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num_trbs = 0;
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/* How much data is (potentially) left before the 64KB boundary? */
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running_total = TRB_MAX_BUFF_SIZE -
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(urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
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/* If there's some data on this 64KB chunk, or we have to send a
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* zero-length transfer, we need at least one TRB
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*/
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if (running_total != 0 || urb->transfer_buffer_length == 0)
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num_trbs++;
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/* How many more 64KB chunks to transfer, how many more TRBs? */
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while (running_total < urb->transfer_buffer_length) {
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num_trbs++;
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running_total += TRB_MAX_BUFF_SIZE;
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}
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/* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */
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if (!in_interrupt())
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dev_dbg(&urb->dev->dev, "ep %#x - urb len = %d, addr = %#x, num_trbs = %d\n",
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urb->ep->desc.bEndpointAddress,
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urb->transfer_buffer_length, urb->transfer_dma,
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num_trbs);
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ret = xhci_prepare_transfer(xhci, xhci->devs[slot_id], ep_index,
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num_trbs, urb, &td, mem_flags);
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if (ret < 0)
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return ret;
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/*
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* Don't give the first TRB to the hardware (by toggling the cycle bit)
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* until we've finished creating all the other TRBs. The ring's cycle
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* state may change as we enqueue the other TRBs, so save it too.
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*/
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start_trb = &ep_ring->enqueue->generic;
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start_cycle = ep_ring->cycle_state;
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running_total = 0;
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/* How much data is in the first TRB? */
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addr = (u64) urb->transfer_dma;
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trb_buff_len = TRB_MAX_BUFF_SIZE -
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(urb->transfer_dma & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
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if (urb->transfer_buffer_length < trb_buff_len)
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trb_buff_len = urb->transfer_buffer_length;
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first_trb = true;
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/* Queue the first TRB, even if it's zero-length */
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do {
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field = 0;
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/* Don't change the cycle bit of the first TRB until later */
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if (first_trb)
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first_trb = false;
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else
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field |= ep_ring->cycle_state;
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/* Chain all the TRBs together; clear the chain bit in the last
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* TRB to indicate it's the last TRB in the chain.
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*/
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if (num_trbs > 1) {
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field |= TRB_CHAIN;
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} else {
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/* FIXME - add check for ZERO_PACKET flag before this */
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td->last_trb = ep_ring->enqueue;
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field |= TRB_IOC;
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}
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queue_trb(xhci, ep_ring, false,
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(u32) addr,
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(u32) ((u64) addr >> 32),
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TRB_LEN(trb_buff_len) | TRB_INTR_TARGET(0),
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/* We always want to know if the TRB was short,
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* or we won't get an event when it completes.
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* (Unless we use event data TRBs, which are a
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* waste of space and HC resources.)
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*/
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field | TRB_ISP | TRB_TYPE(TRB_NORMAL));
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--num_trbs;
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running_total += trb_buff_len;
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/* Calculate length for next transfer */
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addr += trb_buff_len;
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trb_buff_len = urb->transfer_buffer_length - running_total;
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if (trb_buff_len > TRB_MAX_BUFF_SIZE)
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trb_buff_len = TRB_MAX_BUFF_SIZE;
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} while (running_total < urb->transfer_buffer_length);
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if (num_trbs != 0)
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dev_dbg(&urb->dev->dev, "%s - ep %#x - Miscalculated number of "
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"TRBs, %d left\n", __FUNCTION__,
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urb->ep->desc.bEndpointAddress, num_trbs);
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/*
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* Pass all the TRBs to the hardware at once and make sure this write
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* isn't reordered.
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*/
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wmb();
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start_trb->field[3] |= start_cycle;
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field = xhci_readl(xhci, &xhci->dba->doorbell[slot_id]) & DB_MASK;
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xhci_writel(xhci, field | EPI_TO_DB(ep_index), &xhci->dba->doorbell[slot_id]);
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/* Flush PCI posted writes */
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xhci_readl(xhci, &xhci->dba->doorbell[slot_id]);
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return 0;
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}
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/* Caller must have locked xhci->lock */
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int queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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struct urb *urb, int slot_id, unsigned int ep_index)
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@ -889,6 +889,9 @@ union xhci_trb {
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*/
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#define TRBS_PER_SEGMENT 64
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#define SEGMENT_SIZE (TRBS_PER_SEGMENT*16)
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/* TRB buffer pointers can't cross 64KB boundaries */
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#define TRB_MAX_BUFF_SHIFT 16
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#define TRB_MAX_BUFF_SIZE (1 << TRB_MAX_BUFF_SHIFT)
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struct xhci_td {
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struct list_head td_list;
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@ -1117,6 +1120,7 @@ void set_hc_event_deq(struct xhci_hcd *xhci);
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int queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id);
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int queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, u32 slot_id);
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int queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb, int slot_id, unsigned int ep_index);
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int queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb, int slot_id, unsigned int ep_index);
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int queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, u32 slot_id);
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/* xHCI roothub code */
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