MIPS: lib: memcpy: Add MIPS R6 support
MIPS R6 does not support the unaligned load and store instructions so we add a special MIPS R6 case to copy one byte at a time if we need to read/write to unaligned memory addresses. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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@ -293,9 +293,14 @@
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and t0, src, ADDRMASK
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PREFS( 0, 2*32(src) )
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PREFD( 1, 2*32(dst) )
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#ifndef CONFIG_CPU_MIPSR6
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bnez t1, .Ldst_unaligned\@
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nop
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bnez t0, .Lsrc_unaligned_dst_aligned\@
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#else
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or t0, t0, t1
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bnez t0, .Lcopy_unaligned_bytes\@
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#endif
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/*
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* use delay slot for fall-through
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* src and dst are aligned; need to compute rem
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@ -376,6 +381,7 @@
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bne rem, len, 1b
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.set noreorder
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#ifndef CONFIG_CPU_MIPSR6
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/*
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* src and dst are aligned, need to copy rem bytes (rem < NBYTES)
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* A loop would do only a byte at a time with possible branch
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@ -477,6 +483,7 @@
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bne len, rem, 1b
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.set noreorder
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#endif /* !CONFIG_CPU_MIPSR6 */
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.Lcopy_bytes_checklen\@:
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beqz len, .Ldone\@
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nop
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@ -504,6 +511,22 @@
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.Ldone\@:
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jr ra
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nop
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#ifdef CONFIG_CPU_MIPSR6
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.Lcopy_unaligned_bytes\@:
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1:
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COPY_BYTE(0)
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COPY_BYTE(1)
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COPY_BYTE(2)
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COPY_BYTE(3)
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COPY_BYTE(4)
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COPY_BYTE(5)
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COPY_BYTE(6)
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COPY_BYTE(7)
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ADD src, src, 8
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b 1b
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ADD dst, dst, 8
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#endif /* CONFIG_CPU_MIPSR6 */
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.if __memcpy == 1
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END(memcpy)
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.set __memcpy, 0
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