phylib: SIOCGMIIREG/SIOCSMIIREG: allow access to all mdio addresses
phylib would silently ignore the phy_id argument to these ioctls and perform the read/write with the active phydev address, whereas most non-phylib drivers seem to allow access to all mdio addresses (E.G. pcnet_cs). Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 5 additions and 3 deletions
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@ -319,7 +319,8 @@ int phy_mii_ioctl(struct phy_device *phydev,
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/* fall through */
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case SIOCGMIIREG:
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mii_data->val_out = phy_read(phydev, mii_data->reg_num);
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mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
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mii_data->reg_num);
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break;
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case SIOCSMIIREG:
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@ -350,8 +351,9 @@ int phy_mii_ioctl(struct phy_device *phydev,
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}
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}
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phy_write(phydev, mii_data->reg_num, val);
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mdiobus_write(phydev->bus, mii_data->phy_id,
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mii_data->reg_num, val);
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if (mii_data->reg_num == MII_BMCR &&
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val & BMCR_RESET &&
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phydev->drv->config_init) {
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