ath9k: move hw specific btcoex info to ath_hw
Since we now access it via the ath_hw declare the ath_hw pointer at the header of some routines and se it. ath9k.h no longer needs to access btcoex.h and to adjust for this move ath_btcoex_set_weight() into btcoex.h and instead give main.c a helper for setting initial values upon drv_start() Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
2e20250a2c
commit
af03abecd8
6 changed files with 88 additions and 65 deletions
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@ -26,7 +26,6 @@
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#include "rc.h"
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#include "debug.h"
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#include "../ath.h"
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#include "btcoex.h"
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struct ath_node;
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@ -622,7 +621,6 @@ struct ath_softc {
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struct ath_bus_ops *bus_ops;
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struct ath_beacon_config cur_beacon_conf;
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struct delayed_work tx_complete_work;
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struct ath_btcoex_info btcoex_info;
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struct ath_btcoex btcoex;
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};
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@ -43,14 +43,29 @@ bool ath_btcoex_supported(u16 subsysid)
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return false;
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}
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static void ath_btcoex_set_weight(struct ath_btcoex_info *btcoex_info,
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u32 bt_weight,
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u32 wlan_weight)
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{
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btcoex_info->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
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SM(wlan_weight, AR_BTCOEX_WL_WGHT);
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}
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void ath9k_hw_btcoex_init_weight(struct ath_hw *ah)
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{
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ath_btcoex_set_weight(&ah->btcoex_info, AR_BT_COEX_WGHT,
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AR_STOMP_LOW_WLAN_WGHT);
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}
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/*
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* Detects if there is any priority bt traffic
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*/
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static void ath_detect_bt_priority(struct ath_softc *sc)
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{
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struct ath_btcoex *btcoex = &sc->btcoex;
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struct ath_hw *ah = sc->sc_ah;
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if (ath9k_hw_gpio_get(sc->sc_ah, sc->btcoex_info.btpriority_gpio))
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if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_info.btpriority_gpio))
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btcoex->bt_priority_cnt++;
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if (time_after(jiffies, btcoex->bt_priority_time +
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@ -106,8 +121,9 @@ static void ath_btcoex_bt_stomp(struct ath_softc *sc,
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static void ath_btcoex_period_timer(unsigned long data)
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{
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struct ath_softc *sc = (struct ath_softc *) data;
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struct ath_hw *ah = sc->sc_ah;
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struct ath_btcoex *btcoex = &sc->btcoex;
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struct ath_btcoex_info *btinfo = &sc->btcoex_info;
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struct ath_btcoex_info *btinfo = &ah->btcoex_info;
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ath_detect_bt_priority(sc);
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@ -119,9 +135,9 @@ static void ath_btcoex_period_timer(unsigned long data)
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if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
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if (btcoex->hw_timer_enabled)
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ath_gen_timer_stop(sc->sc_ah, btinfo->no_stomp_timer);
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ath_gen_timer_stop(ah, btinfo->no_stomp_timer);
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ath_gen_timer_start(sc->sc_ah,
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ath_gen_timer_start(ah,
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btinfo->no_stomp_timer,
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(ath9k_hw_gettsf32(sc->sc_ah) +
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btcoex->btcoex_no_stomp),
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@ -141,10 +157,11 @@ static void ath_btcoex_period_timer(unsigned long data)
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static void ath_btcoex_no_stomp_timer(void *arg)
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{
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struct ath_softc *sc = (struct ath_softc *)arg;
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struct ath_hw *ah = sc->sc_ah;
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struct ath_btcoex *btcoex = &sc->btcoex;
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struct ath_btcoex_info *btinfo = &sc->btcoex_info;
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struct ath_btcoex_info *btinfo = &ah->btcoex_info;
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DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "no stomp timer running \n");
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DPRINTF(ah, ATH_DBG_BTCOEX, "no stomp timer running \n");
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spin_lock_bh(&btcoex->btcoex_lock);
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@ -156,14 +173,14 @@ static void ath_btcoex_no_stomp_timer(void *arg)
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spin_unlock_bh(&btcoex->btcoex_lock);
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}
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static int ath_init_btcoex_info(struct ath_hw *hw,
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static int ath_init_btcoex_info(struct ath_hw *ah,
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struct ath_btcoex_info *btcoex_info)
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{
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struct ath_btcoex *btcoex = &hw->ah_sc->btcoex;
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struct ath_btcoex *btcoex = &ah->ah_sc->btcoex;
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u32 i;
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int qnum;
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qnum = ath_tx_get_qnum(hw->ah_sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
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qnum = ath_tx_get_qnum(ah->ah_sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
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btcoex_info->bt_coex_mode =
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(btcoex_info->bt_coex_mode & AR_BT_QCU_THRESH) |
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@ -190,15 +207,15 @@ static int ath_init_btcoex_info(struct ath_hw *hw,
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btcoex->btcoex_period / 100;
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for (i = 0; i < 32; i++)
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hw->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i;
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ah->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i;
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setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
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(unsigned long) hw->ah_sc);
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(unsigned long) ah->ah_sc);
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btcoex_info->no_stomp_timer = ath_gen_timer_alloc(hw,
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btcoex_info->no_stomp_timer = ath_gen_timer_alloc(ah,
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ath_btcoex_no_stomp_timer,
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ath_btcoex_no_stomp_timer,
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(void *)hw->ah_sc, AR_FIRST_NDP_TIMER);
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(void *)ah->ah_sc, AR_FIRST_NDP_TIMER);
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if (btcoex_info->no_stomp_timer == NULL)
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return -ENOMEM;
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@ -210,7 +227,7 @@ static int ath_init_btcoex_info(struct ath_hw *hw,
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int ath9k_hw_btcoex_init(struct ath_hw *ah)
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{
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struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info;
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struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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int ret = 0;
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if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
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@ -258,7 +275,7 @@ int ath9k_hw_btcoex_init(struct ath_hw *ah)
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void ath9k_hw_btcoex_enable(struct ath_hw *ah)
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{
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struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info;
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struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
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/* Configure the desired GPIO port for TX_FRAME output */
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@ -291,7 +308,7 @@ void ath9k_hw_btcoex_enable(struct ath_hw *ah)
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void ath9k_hw_btcoex_disable(struct ath_hw *ah)
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{
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struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info;
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struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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ath9k_hw_set_gpio(ah, btcoex_info->wlanactive_gpio, 0);
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@ -313,11 +330,12 @@ void ath9k_hw_btcoex_disable(struct ath_hw *ah)
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void ath_btcoex_timer_pause(struct ath_softc *sc)
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{
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struct ath_btcoex *btcoex = &sc->btcoex;
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struct ath_hw *ah = sc->sc_ah;
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del_timer_sync(&btcoex->period_timer);
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if (btcoex->hw_timer_enabled)
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ath_gen_timer_stop(sc->sc_ah, sc->btcoex_info.no_stomp_timer);
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ath_gen_timer_stop(ah, ah->btcoex_info.no_stomp_timer);
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btcoex->hw_timer_enabled = false;
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}
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@ -328,12 +346,13 @@ void ath_btcoex_timer_pause(struct ath_softc *sc)
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void ath_btcoex_timer_resume(struct ath_softc *sc)
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{
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struct ath_btcoex *btcoex = &sc->btcoex;
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struct ath_hw *ah = sc->sc_ah;
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DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "Starting btcoex timers");
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DPRINTF(ah, ATH_DBG_BTCOEX, "Starting btcoex timers");
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/* make sure duty cycle timer is also stopped when resuming */
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if (btcoex->hw_timer_enabled)
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ath_gen_timer_stop(sc->sc_ah, sc->btcoex_info.no_stomp_timer);
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ath_gen_timer_stop(sc->sc_ah, ah->btcoex_info.no_stomp_timer);
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btcoex->bt_priority_cnt = 0;
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btcoex->bt_priority_time = jiffies;
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@ -17,6 +17,8 @@
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#ifndef BTCOEX_H
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#define BTCOEX_H
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#include "hw.h"
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#define ATH_WLANACTIVE_GPIO 5
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#define ATH_BTACTIVE_GPIO 6
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#define ATH_BTPRIORITY_GPIO 7
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};
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bool ath_btcoex_supported(u16 subsysid);
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void ath9k_hw_btcoex_init_weight(struct ath_hw *ah);
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int ath9k_hw_btcoex_init(struct ath_hw *ah);
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void ath9k_hw_btcoex_enable(struct ath_hw *ah);
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void ath9k_hw_btcoex_disable(struct ath_hw *ah);
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void ath_btcoex_timer_resume(struct ath_softc *sc);
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void ath_btcoex_timer_pause(struct ath_softc *sc);
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static inline void ath_btcoex_set_weight(struct ath_btcoex_info *btcoex_info,
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u32 bt_weight,
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u32 wlan_weight)
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{
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btcoex_info->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
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SM(wlan_weight, AR_BTCOEX_WL_WGHT);
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}
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#endif
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@ -18,6 +18,7 @@
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#include <asm/unaligned.h>
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#include <linux/pci.h>
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#include "hw.h"
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#include "ath9k.h"
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#include "initvals.h"
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@ -3558,7 +3559,7 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
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{
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struct ath9k_hw_capabilities *pCap = &ah->caps;
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struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
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struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info;
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struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
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u16 capField = 0, eeval;
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@ -27,6 +27,7 @@
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#include "calib.h"
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#include "reg.h"
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#include "phy.h"
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#include "btcoex.h"
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#include "../regd.h"
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@ -553,6 +554,9 @@ struct ath_hw {
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int firpwr[5];
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enum ath9k_ani_cmd ani_function;
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/* Bluetooth coexistance */
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struct ath_btcoex_info btcoex_info;
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u32 intr_txqs;
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enum ath9k_ht_extprotspacing extprotspacing;
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u8 txchainmask;
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@ -675,4 +679,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah);
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#define ATH_PCIE_CAP_LINK_L1 2
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void ath_pcie_aspm_disable(struct ath_softc *sc);
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void ath_btcoex_timer_resume(struct ath_softc *sc);
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void ath_btcoex_timer_pause(struct ath_softc *sc);
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#endif
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@ -16,6 +16,7 @@
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#include <linux/nl80211.h>
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#include "ath9k.h"
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#include "btcoex.h"
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static char *dev_info = "ath9k";
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@ -439,8 +440,10 @@ static void ath_start_ani(struct ath_softc *sc)
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*/
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void ath_update_chainmask(struct ath_softc *sc, int is_ht)
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{
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struct ath_hw *ah = sc->sc_ah;
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if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
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(sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE)) {
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(ah->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE)) {
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sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
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sc->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
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} else {
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@ -448,7 +451,7 @@ void ath_update_chainmask(struct ath_softc *sc, int is_ht)
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sc->rx_chainmask = 1;
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}
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DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n",
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DPRINTF(ah, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n",
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sc->tx_chainmask, sc->rx_chainmask);
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}
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@ -478,6 +481,8 @@ static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
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static void ath9k_tasklet(unsigned long data)
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{
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struct ath_softc *sc = (struct ath_softc *)data;
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struct ath_hw *ah = sc->sc_ah;
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u32 status = sc->intrstatus;
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ath9k_ps_wakeup(sc);
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@ -502,16 +507,16 @@ static void ath9k_tasklet(unsigned long data)
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* TSF sync does not look correct; remain awake to sync with
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* the next Beacon.
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*/
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DPRINTF(sc->sc_ah, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n");
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DPRINTF(ah, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n");
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sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC;
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}
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if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
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if (ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
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if (status & ATH9K_INT_GENTIMER)
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ath_gen_timer_isr(sc->sc_ah);
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/* re-enable hardware interrupt */
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ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
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ath9k_hw_set_interrupts(ah, sc->imask);
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ath9k_ps_restore(sc);
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}
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@ -1281,12 +1286,12 @@ void ath_detach(struct ath_softc *sc)
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if (ATH_TXQ_SETUP(sc, i))
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ath_tx_cleanupq(sc, &sc->tx.txq[i]);
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if ((sc->btcoex_info.no_stomp_timer) &&
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sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
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ath_gen_timer_free(ah, sc->btcoex_info.no_stomp_timer);
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if ((ah->btcoex_info.no_stomp_timer) &&
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ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
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ath_gen_timer_free(ah, ah->btcoex_info.no_stomp_timer);
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ath9k_hw_detach(ah);
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ath9k_exit_debug(sc->sc_ah);
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ath9k_exit_debug(ah);
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sc->sc_ah = NULL;
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}
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@ -1516,7 +1521,7 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid)
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ARRAY_SIZE(ath9k_5ghz_chantable);
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}
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if (sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) {
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if (ah->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) {
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r = ath9k_hw_btcoex_init(ah);
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if (r)
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goto bad2;
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@ -1905,11 +1910,12 @@ static int ath9k_start(struct ieee80211_hw *hw)
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{
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struct ath_wiphy *aphy = hw->priv;
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struct ath_softc *sc = aphy->sc;
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struct ath_hw *ah = sc->sc_ah;
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struct ieee80211_channel *curchan = hw->conf.channel;
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struct ath9k_channel *init_channel;
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int r;
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DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Starting driver with "
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DPRINTF(ah, ATH_DBG_CONFIG, "Starting driver with "
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"initial channel: %d MHz\n", curchan->center_freq);
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mutex_lock(&sc->mutex);
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@ -1942,7 +1948,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
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init_channel = ath_get_curchannel(sc, hw);
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/* Reset SERDES registers */
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ath9k_hw_configpcipowersave(sc->sc_ah, 0, 0);
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ath9k_hw_configpcipowersave(ah, 0, 0);
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/*
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* The basic interface to setting the hardware in a good
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@ -1952,9 +1958,9 @@ static int ath9k_start(struct ieee80211_hw *hw)
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* and then setup of the interrupt mask.
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*/
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spin_lock_bh(&sc->sc_resetlock);
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r = ath9k_hw_reset(sc->sc_ah, init_channel, false);
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r = ath9k_hw_reset(ah, init_channel, false);
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if (r) {
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DPRINTF(sc->sc_ah, ATH_DBG_FATAL,
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DPRINTF(ah, ATH_DBG_FATAL,
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"Unable to reset hardware; reset status %d "
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"(freq %u MHz)\n", r,
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curchan->center_freq);
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@ -1977,7 +1983,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
|||
* here except setup the interrupt mask.
|
||||
*/
|
||||
if (ath_startrecv(sc) != 0) {
|
||||
DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "Unable to start recv logic\n");
|
||||
DPRINTF(ah, ATH_DBG_FATAL, "Unable to start recv logic\n");
|
||||
r = -EIO;
|
||||
goto mutex_unlock;
|
||||
}
|
||||
|
@ -1987,10 +1993,10 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
|||
| ATH9K_INT_RXEOL | ATH9K_INT_RXORN
|
||||
| ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
|
||||
|
||||
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
|
||||
if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
|
||||
sc->imask |= ATH9K_INT_GTT;
|
||||
|
||||
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
|
||||
if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
|
||||
sc->imask |= ATH9K_INT_CST;
|
||||
|
||||
ath_cache_conf_rate(sc, &hw->conf);
|
||||
|
@ -1999,20 +2005,19 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
|||
|
||||
/* Disable BMISS interrupt when we're not associated */
|
||||
sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
|
||||
ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
|
||||
ath9k_hw_set_interrupts(ah, sc->imask);
|
||||
|
||||
ieee80211_wake_queues(hw);
|
||||
|
||||
ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
|
||||
|
||||
if ((sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) &&
|
||||
if ((ah->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) &&
|
||||
!(sc->sc_flags & SC_OP_BTCOEX_ENABLED)) {
|
||||
ath_btcoex_set_weight(&sc->btcoex_info, AR_BT_COEX_WGHT,
|
||||
AR_STOMP_LOW_WLAN_WGHT);
|
||||
ath9k_hw_btcoex_enable(sc->sc_ah);
|
||||
ath9k_hw_btcoex_init_weight(ah);
|
||||
ath9k_hw_btcoex_enable(ah);
|
||||
|
||||
ath_pcie_aspm_disable(sc);
|
||||
if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
if (ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath_btcoex_timer_resume(sc);
|
||||
}
|
||||
|
||||
|
@ -2125,6 +2130,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
{
|
||||
struct ath_wiphy *aphy = hw->priv;
|
||||
struct ath_softc *sc = aphy->sc;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
|
||||
mutex_lock(&sc->mutex);
|
||||
|
||||
|
@ -2139,7 +2145,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
}
|
||||
|
||||
if (sc->sc_flags & SC_OP_INVALID) {
|
||||
DPRINTF(sc->sc_ah, ATH_DBG_ANY, "Device not present\n");
|
||||
DPRINTF(ah, ATH_DBG_ANY, "Device not present\n");
|
||||
mutex_unlock(&sc->mutex);
|
||||
return;
|
||||
}
|
||||
|
@ -2150,32 +2156,32 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
}
|
||||
|
||||
if (sc->sc_flags & SC_OP_BTCOEX_ENABLED) {
|
||||
ath9k_hw_btcoex_disable(sc->sc_ah);
|
||||
if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath9k_hw_btcoex_disable(ah);
|
||||
if (ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath_btcoex_timer_pause(sc);
|
||||
}
|
||||
|
||||
/* make sure h/w will not generate any interrupt
|
||||
* before setting the invalid flag. */
|
||||
ath9k_hw_set_interrupts(sc->sc_ah, 0);
|
||||
ath9k_hw_set_interrupts(ah, 0);
|
||||
|
||||
if (!(sc->sc_flags & SC_OP_INVALID)) {
|
||||
ath_drain_all_txq(sc, false);
|
||||
ath_stoprecv(sc);
|
||||
ath9k_hw_phy_disable(sc->sc_ah);
|
||||
ath9k_hw_phy_disable(ah);
|
||||
} else
|
||||
sc->rx.rxlink = NULL;
|
||||
|
||||
/* disable HAL and put h/w to sleep */
|
||||
ath9k_hw_disable(sc->sc_ah);
|
||||
ath9k_hw_configpcipowersave(sc->sc_ah, 1, 1);
|
||||
ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
|
||||
ath9k_hw_disable(ah);
|
||||
ath9k_hw_configpcipowersave(ah, 1, 1);
|
||||
ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
|
||||
|
||||
sc->sc_flags |= SC_OP_INVALID;
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
|
||||
DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Driver halt\n");
|
||||
DPRINTF(ah, ATH_DBG_CONFIG, "Driver halt\n");
|
||||
}
|
||||
|
||||
static int ath9k_add_interface(struct ieee80211_hw *hw,
|
||||
|
|
Loading…
Reference in a new issue