spi: uniphier: fix incorrect property items

[ Upstream commit 3511ba7d4ca6f39e2d060bb94e42a41ad1fee7bf ]

This commit fixes incorrect property because it was different
from the actual.
The parameters of '#address-cells' and '#size-cells' were removed,
and 'interrupts', 'pinctrl-names' and 'pinctrl-0' were added.

Fixes: 4dcd5c2781 ("spi: add DT bindings for UniPhier SPI controller")
Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Keiji Hayashibara 2018-10-24 18:34:29 +09:00 committed by Greg Kroah-Hartman
parent 6c2075f792
commit adcb6d9ff1

View file

@ -5,18 +5,20 @@ UniPhier SoCs have SCSSI which supports SPI single channel.
Required properties: Required properties:
- compatible: should be "socionext,uniphier-scssi" - compatible: should be "socionext,uniphier-scssi"
- reg: address and length of the spi master registers - reg: address and length of the spi master registers
- #address-cells: must be <1>, see spi-bus.txt - interrupts: a single interrupt specifier
- #size-cells: must be <0>, see spi-bus.txt - pinctrl-names: should be "default"
- clocks: A phandle to the clock for the device. - pinctrl-0: pin control state for the default mode
- resets: A phandle to the reset control for the device. - clocks: a phandle to the clock for the device
- resets: a phandle to the reset control for the device
Example: Example:
spi0: spi@54006000 { spi0: spi@54006000 {
compatible = "socionext,uniphier-scssi"; compatible = "socionext,uniphier-scssi";
reg = <0x54006000 0x100>; reg = <0x54006000 0x100>;
#address-cells = <1>; interrupts = <0 39 4>;
#size-cells = <0>; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
clocks = <&peri_clk 11>; clocks = <&peri_clk 11>;
resets = <&peri_rst 11>; resets = <&peri_rst 11>;
}; };