spi: uniphier: fix incorrect property items
[ Upstream commit 3511ba7d4ca6f39e2d060bb94e42a41ad1fee7bf ]
This commit fixes incorrect property because it was different
from the actual.
The parameters of '#address-cells' and '#size-cells' were removed,
and 'interrupts', 'pinctrl-names' and 'pinctrl-0' were added.
Fixes: 4dcd5c2781
("spi: add DT bindings for UniPhier SPI controller")
Signed-off-by: Keiji Hayashibara <hayashibara.keiji@socionext.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 8 additions and 6 deletions
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@ -5,18 +5,20 @@ UniPhier SoCs have SCSSI which supports SPI single channel.
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Required properties:
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Required properties:
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- compatible: should be "socionext,uniphier-scssi"
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- compatible: should be "socionext,uniphier-scssi"
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- reg: address and length of the spi master registers
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- reg: address and length of the spi master registers
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- #address-cells: must be <1>, see spi-bus.txt
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- interrupts: a single interrupt specifier
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- #size-cells: must be <0>, see spi-bus.txt
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- pinctrl-names: should be "default"
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- clocks: A phandle to the clock for the device.
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- pinctrl-0: pin control state for the default mode
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- resets: A phandle to the reset control for the device.
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- clocks: a phandle to the clock for the device
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- resets: a phandle to the reset control for the device
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Example:
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Example:
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spi0: spi@54006000 {
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spi0: spi@54006000 {
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compatible = "socionext,uniphier-scssi";
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compatible = "socionext,uniphier-scssi";
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reg = <0x54006000 0x100>;
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reg = <0x54006000 0x100>;
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#address-cells = <1>;
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interrupts = <0 39 4>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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clocks = <&peri_clk 11>;
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clocks = <&peri_clk 11>;
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resets = <&peri_rst 11>;
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resets = <&peri_rst 11>;
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};
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};
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