arm64: kernel: Rework finisher callback out of __cpu_suspend_enter()
Hibernate could make use of the cpu_suspend() code to save/restore cpu state, however it needs to be able to return '0' from the 'finisher'. Rework cpu_suspend() so that the finisher is called from C code, independently from the save/restore of cpu state. Space to save the context in is allocated in the caller's stack frame, and passed into __cpu_suspend_enter(). Hibernate's use of this API will look like a copy of the cpu_suspend() function. Signed-off-by: James Morse <james.morse@arm.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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4 changed files with 97 additions and 90 deletions
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@ -2,6 +2,7 @@
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#define __ASM_SUSPEND_H
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#define NR_CTX_REGS 11
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#define NR_CALLEE_SAVED_REGS 12
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/*
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* struct cpu_suspend_ctx must be 16-byte aligned since it is allocated on
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@ -21,6 +22,25 @@ struct sleep_save_sp {
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phys_addr_t save_ptr_stash_phys;
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};
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/*
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* Memory to save the cpu state is allocated on the stack by
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* __cpu_suspend_enter()'s caller, and populated by __cpu_suspend_enter().
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* This data must survive until cpu_resume() is called.
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*
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* This struct desribes the size and the layout of the saved cpu state.
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* The layout of the callee_saved_regs is defined by the implementation
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* of __cpu_suspend_enter(), and cpu_resume(). This struct must be passed
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* in by the caller as __cpu_suspend_enter()'s stack-frame is gone once it
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* returns, and the data would be subsequently corrupted by the call to the
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* finisher.
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*/
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struct sleep_stack_data {
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struct cpu_suspend_ctx system_regs;
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unsigned long callee_saved_regs[NR_CALLEE_SAVED_REGS];
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};
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extern int cpu_suspend(unsigned long arg, int (*fn)(unsigned long));
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extern void cpu_resume(void);
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int __cpu_suspend_enter(struct sleep_stack_data *state);
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void __cpu_suspend_exit(void);
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#endif
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@ -122,6 +122,8 @@ int main(void)
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DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
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DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
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DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
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DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs));
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DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs));
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#endif
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DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
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DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
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@ -49,37 +49,30 @@
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orr \dst, \dst, \mask // dst|=(aff3>>rs3)
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.endm
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/*
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* Save CPU state for a suspend and execute the suspend finisher.
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* On success it will return 0 through cpu_resume - ie through a CPU
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* soft/hard reboot from the reset vector.
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* On failure it returns the suspend finisher return value or force
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* -EOPNOTSUPP if the finisher erroneously returns 0 (the suspend finisher
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* is not allowed to return, if it does this must be considered failure).
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* It saves callee registers, and allocates space on the kernel stack
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* to save the CPU specific registers + some other data for resume.
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* Save CPU state in the provided sleep_stack_data area, and publish its
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* location for cpu_resume()'s use in sleep_save_stash.
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*
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* x0 = suspend finisher argument
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* x1 = suspend finisher function pointer
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* cpu_resume() will restore this saved state, and return. Because the
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* link-register is saved and restored, it will appear to return from this
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* function. So that the caller can tell the suspend/resume paths apart,
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* __cpu_suspend_enter() will always return a non-zero value, whereas the
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* path through cpu_resume() will return 0.
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*
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* x0 = struct sleep_stack_data area
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*/
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ENTRY(__cpu_suspend_enter)
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stp x29, lr, [sp, #-96]!
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stp x19, x20, [sp,#16]
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stp x21, x22, [sp,#32]
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stp x23, x24, [sp,#48]
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stp x25, x26, [sp,#64]
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stp x27, x28, [sp,#80]
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/*
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* Stash suspend finisher and its argument in x20 and x19
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*/
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mov x19, x0
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mov x20, x1
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stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
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stp x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
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stp x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
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stp x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
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stp x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
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stp x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
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/* save the sp in cpu_suspend_ctx */
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mov x2, sp
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sub sp, sp, #CPU_SUSPEND_SZ // allocate cpu_suspend_ctx
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mov x0, sp
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/*
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* x0 now points to struct cpu_suspend_ctx allocated on the stack
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*/
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str x2, [x0, #CPU_CTX_SP]
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str x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
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/* find the mpidr_hash */
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ldr x1, =sleep_save_sp
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ldr x1, [x1, #SLEEP_SAVE_SP_VIRT]
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mrs x7, mpidr_el1
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@ -93,34 +86,11 @@ ENTRY(__cpu_suspend_enter)
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ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
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compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
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add x1, x1, x8, lsl #3
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stp x29, lr, [sp, #-16]!
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bl __cpu_suspend_save
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/*
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* Grab suspend finisher in x20 and its argument in x19
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*/
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mov x0, x19
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mov x1, x20
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/*
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* We are ready for power down, fire off the suspend finisher
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* in x1, with argument in x0
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*/
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blr x1
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/*
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* Never gets here, unless suspend finisher fails.
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* Successful cpu_suspend should return from cpu_resume, returning
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* through this code path is considered an error
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* If the return value is set to 0 force x0 = -EOPNOTSUPP
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* to make sure a proper error condition is propagated
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*/
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cmp x0, #0
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mov x3, #-EOPNOTSUPP
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csel x0, x3, x0, eq
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add sp, sp, #CPU_SUSPEND_SZ // rewind stack pointer
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ldp x19, x20, [sp, #16]
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ldp x21, x22, [sp, #32]
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ldp x23, x24, [sp, #48]
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ldp x25, x26, [sp, #64]
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ldp x27, x28, [sp, #80]
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ldp x29, lr, [sp], #96
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ldp x29, lr, [sp], #16
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mov x0, #1
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ret
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ENDPROC(__cpu_suspend_enter)
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.ltorg
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@ -150,12 +120,6 @@ cpu_resume_after_mmu:
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bl kasan_unpoison_remaining_stack
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#endif
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mov x0, #0 // return zero on success
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ldp x19, x20, [sp, #16]
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ldp x21, x22, [sp, #32]
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ldp x23, x24, [sp, #48]
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ldp x25, x26, [sp, #64]
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ldp x27, x28, [sp, #80]
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ldp x29, lr, [sp], #96
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ret
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ENDPROC(cpu_resume_after_mmu)
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@ -172,6 +136,8 @@ ENTRY(cpu_resume)
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/* x7 contains hash index, let's use it to grab context pointer */
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ldr_l x0, sleep_save_sp + SLEEP_SAVE_SP_PHYS
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ldr x0, [x0, x7, lsl #3]
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add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
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add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
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/* load sp from context */
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ldr x2, [x0, #CPU_CTX_SP]
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/* load physical address of identity map page table in x1 */
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@ -185,5 +151,12 @@ ENTRY(cpu_resume)
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* pointer and x1 to contain physical address of 1:1 page tables
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*/
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bl cpu_do_resume // PC relative jump, MMU off
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/* Can't access these by physical address once the MMU is on */
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ldp x19, x20, [x29, #16]
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ldp x21, x22, [x29, #32]
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ldp x23, x24, [x29, #48]
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ldp x25, x26, [x29, #64]
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ldp x27, x28, [x29, #80]
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ldp x29, lr, [x29]
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b cpu_resume_mmu // Resume MMU, never returns
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ENDPROC(cpu_resume)
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@ -10,22 +10,22 @@
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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extern int __cpu_suspend_enter(unsigned long arg, int (*fn)(unsigned long));
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/*
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* This is called by __cpu_suspend_enter() to save the state, and do whatever
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* flushing is required to ensure that when the CPU goes to sleep we have
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* the necessary data available when the caches are not searched.
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*
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* ptr: CPU context virtual address
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* ptr: sleep_stack_data containing cpu state virtual address.
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* save_ptr: address of the location where the context physical address
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* must be saved
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*/
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void notrace __cpu_suspend_save(struct cpu_suspend_ctx *ptr,
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void notrace __cpu_suspend_save(struct sleep_stack_data *ptr,
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phys_addr_t *save_ptr)
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{
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*save_ptr = virt_to_phys(ptr);
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cpu_do_suspend(ptr);
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cpu_do_suspend(&ptr->system_regs);
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/*
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* Only flush the context that must be retrieved with the MMU
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* off. VA primitives ensure the flush is applied to all
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@ -51,6 +51,30 @@ void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *))
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hw_breakpoint_restore = hw_bp_restore;
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}
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void notrace __cpu_suspend_exit(void)
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{
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/*
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* We are resuming from reset with the idmap active in TTBR0_EL1.
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* We must uninstall the idmap and restore the expected MMU
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* state before we can possibly return to userspace.
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*/
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cpu_uninstall_idmap();
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/*
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* Restore per-cpu offset before any kernel
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* subsystem relying on it has a chance to run.
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*/
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
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/*
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* Restore HW breakpoint registers to sane values
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* before debug exceptions are possibly reenabled
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* through local_dbg_restore.
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*/
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if (hw_breakpoint_restore)
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hw_breakpoint_restore(NULL);
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}
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/*
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* cpu_suspend
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*
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@ -60,8 +84,9 @@ void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *))
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*/
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int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
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{
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int ret;
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int ret = 0;
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unsigned long flags;
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struct sleep_stack_data state;
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/*
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* From this point debug exceptions are disabled to prevent
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@ -77,34 +102,21 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
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*/
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pause_graph_tracing();
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/*
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* mm context saved on the stack, it will be restored when
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* the cpu comes out of reset through the identity mapped
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* page tables, so that the thread address space is properly
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* set-up on function return.
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*/
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ret = __cpu_suspend_enter(arg, fn);
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if (ret == 0) {
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/*
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* We are resuming from reset with the idmap active in TTBR0_EL1.
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* We must uninstall the idmap and restore the expected MMU
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* state before we can possibly return to userspace.
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*/
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cpu_uninstall_idmap();
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if (__cpu_suspend_enter(&state)) {
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/* Call the suspend finisher */
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ret = fn(arg);
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/*
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* Restore per-cpu offset before any kernel
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* subsystem relying on it has a chance to run.
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* Never gets here, unless the suspend finisher fails.
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* Successful cpu_suspend() should return from cpu_resume(),
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* returning through this code path is considered an error
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* If the return value is set to 0 force ret = -EOPNOTSUPP
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* to make sure a proper error condition is propagated
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*/
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
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/*
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* Restore HW breakpoint registers to sane values
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* before debug exceptions are possibly reenabled
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* through local_dbg_restore.
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*/
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if (hw_breakpoint_restore)
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hw_breakpoint_restore(NULL);
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if (!ret)
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ret = -EOPNOTSUPP;
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} else {
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__cpu_suspend_exit();
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}
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unpause_graph_tracing();
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