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ARM: S5PV310: Add serial port support

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This patch adds UART serial port support for S5PV310.
In the case of that serial device has just one clock source, driver can not
control clock source. So add check function in get_clksrc and set_clksrc.

Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Acked-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Jongpill Lee 2010-07-16 15:07:37 +09:00 committed by Kukjin Kim
parent b1d69cc670
commit acfdc56d54
2 changed files with 10 additions and 2 deletions
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4
drivers/serial/Kconfig
View file

@ -544,8 +544,8 @@ config SERIAL_S3C6400
config SERIAL_S5PV210 config SERIAL_S5PV210
tristate "Samsung S5PV210 Serial port support" tristate "Samsung S5PV210 Serial port support"
depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442) depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_S5PV310)
select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210 select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_S5PV310)
default y default y
help help
Serial port support for Samsung's S5P Family of SoC's Serial port support for Samsung's S5P Family of SoC's

8
drivers/serial/s5pv210.c
View file

@ -28,8 +28,12 @@
static int s5pv210_serial_setsource(struct uart_port *port, static int s5pv210_serial_setsource(struct uart_port *port,
struct s3c24xx_uart_clksrc *clk) struct s3c24xx_uart_clksrc *clk)
{ {
struct s3c2410_uartcfg *cfg = port->dev->platform_data;
unsigned long ucon = rd_regl(port, S3C2410_UCON); unsigned long ucon = rd_regl(port, S3C2410_UCON);
if ((cfg->clocks_size) == 1)
return 0;
if (strcmp(clk->name, "pclk") == 0) if (strcmp(clk->name, "pclk") == 0)
ucon &= ~S5PV210_UCON_CLKMASK; ucon &= ~S5PV210_UCON_CLKMASK;
else if (strcmp(clk->name, "uclk1") == 0) else if (strcmp(clk->name, "uclk1") == 0)
@ -47,10 +51,14 @@ static int s5pv210_serial_setsource(struct uart_port *port,
static int s5pv210_serial_getsource(struct uart_port *port, static int s5pv210_serial_getsource(struct uart_port *port,
struct s3c24xx_uart_clksrc *clk) struct s3c24xx_uart_clksrc *clk)
{ {
struct s3c2410_uartcfg *cfg = port->dev->platform_data;
u32 ucon = rd_regl(port, S3C2410_UCON); u32 ucon = rd_regl(port, S3C2410_UCON);
clk->divisor = 1; clk->divisor = 1;
if ((cfg->clocks_size) == 1)
return 0;
switch (ucon & S5PV210_UCON_CLKMASK) { switch (ucon & S5PV210_UCON_CLKMASK) {
case S5PV210_UCON_PCLK: case S5PV210_UCON_PCLK:
clk->name = "pclk"; clk->name = "pclk";