MIPS: Probe for small (1KiB) page support

Probe Config3 for small page support. This will be useful to give clues
as to whether the PageGrain register exists.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10722/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan 2015-07-15 16:17:44 +01:00 committed by Ralf Baechle
parent 3c865dd9c1
commit aaa7be48fd
3 changed files with 7 additions and 0 deletions

View file

@ -411,4 +411,8 @@
# define cpu_has_cdmm (cpu_data[0].options & MIPS_CPU_CDMM) # define cpu_has_cdmm (cpu_data[0].options & MIPS_CPU_CDMM)
#endif #endif
#ifndef cpu_has_small_pages
# define cpu_has_small_pages (cpu_data[0].options & MIPS_CPU_SP)
#endif
#endif /* __ASM_CPU_FEATURES_H */ #endif /* __ASM_CPU_FEATURES_H */

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@ -384,6 +384,7 @@ enum cpu_type_enum {
#define MIPS_CPU_XPA 0x2000000000ull /* CPU supports Extended Physical Addressing */ #define MIPS_CPU_XPA 0x2000000000ull /* CPU supports Extended Physical Addressing */
#define MIPS_CPU_CDMM 0x4000000000ull /* CPU has Common Device Memory Map */ #define MIPS_CPU_CDMM 0x4000000000ull /* CPU has Common Device Memory Map */
#define MIPS_CPU_BP_GHIST 0x8000000000ull /* R12K+ Branch Prediction Global History */ #define MIPS_CPU_BP_GHIST 0x8000000000ull /* R12K+ Branch Prediction Global History */
#define MIPS_CPU_SP 0x10000000000ull /* Small (1KB) page support */
/* /*
* CPU ASE encodings * CPU ASE encodings

View file

@ -538,6 +538,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
} }
if (config3 & MIPS_CONF3_CDMM) if (config3 & MIPS_CONF3_CDMM)
c->options |= MIPS_CPU_CDMM; c->options |= MIPS_CPU_CDMM;
if (config3 & MIPS_CONF3_SP)
c->options |= MIPS_CPU_SP;
return config3 & MIPS_CONF_M; return config3 & MIPS_CONF_M;
} }