Merge branch 'next-i2c-mpc-v8' into next-i2c
This commit is contained in:
Ben Dooks
commit
aaa02ab557
3 changed files with 146 additions and 85 deletions
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@ -2,15 +2,14 @@
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Required properties :
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- device_type : Should be "i2c"
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- reg : Offset and length of the register set for the device
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- compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
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compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
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mpc5200 or mpc5200b. For the mpc5121, an additional node
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"fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
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Recommended properties :
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- compatible : compatibility list with 2 entries, the first should
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be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
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e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
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should be "fsl-i2c".
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- interrupts : <a b> where a is the interrupt number and b is a
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field that represents an encoding of the sense and level
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information for the interrupt. This should be encoded based on
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@ -24,25 +23,40 @@ Recommended properties :
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Examples :
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/* MPC5121 based board */
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i2c@1740 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5121-i2c", "fsl-i2c";
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reg = <0x1740 0x20>;
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interrupts = <11 0x8>;
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interrupt-parent = <&ipic>;
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clock-frequency = <100000>;
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};
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i2ccontrol@1760 {
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compatible = "fsl,mpc5121-i2c-ctrl";
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reg = <0x1760 0x8>;
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};
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/* MPC5200B based board */
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i2c@3d00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
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cell-index = <0>;
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reg = <0x3d00 0x40>;
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interrupts = <2 15 0>;
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interrupt-parent = <&mpc5200_pic>;
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fsl,preserve-clocking;
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};
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/* MPC8544 base board */
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i2c@3100 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <1>;
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compatible = "fsl,mpc8544-i2c", "fsl-i2c";
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reg = <0x3100 0x100>;
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interrupts = <43 2>;
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interrupt-parent = <&mpic>;
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clock-frequency = <400000>;
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};
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@ -419,13 +419,12 @@ config I2C_IXP2000
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instead.
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config I2C_MPC
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tristate "MPC107/824x/85xx/52xx/86xx"
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tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
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depends on PPC32
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help
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If you say yes to this option, support will be included for the
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built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
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MPC85xx/MPC8641 family processors. The driver may also work on 52xx
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family processors, though interrupts are known not to work.
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built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
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MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
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This driver can also be built as a module. If so, the module
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will be called i2c-mpc.
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@ -31,6 +31,9 @@
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#define DRV_NAME "mpc-i2c"
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#define MPC_I2C_CLOCK_LEGACY 0
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#define MPC_I2C_CLOCK_PRESERVE (~0U)
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#define MPC_I2C_FDR 0x04
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#define MPC_I2C_CR 0x08
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#define MPC_I2C_SR 0x0c
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@ -66,10 +69,9 @@ struct mpc_i2c_divider {
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u16 fdr; /* including dfsrr */
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};
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struct mpc_i2c_match_data {
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void (*setclock)(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler);
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struct mpc_i2c_data {
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void (*setup)(struct device_node *node, struct mpc_i2c *i2c,
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u32 clock, u32 prescaler);
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u32 prescaler;
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};
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@ -164,8 +166,8 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
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return 0;
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}
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#ifdef CONFIG_PPC_MPC52xx
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static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
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#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x)
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static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
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{20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23},
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{28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02},
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{36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28},
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@ -186,14 +188,15 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = {
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{10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f}
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};
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int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
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static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
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int prescaler)
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{
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const struct mpc_i2c_divider *div = NULL;
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unsigned int pvr = mfspr(SPRN_PVR);
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u32 divider;
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int i;
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if (!clock)
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if (clock == MPC_I2C_CLOCK_LEGACY)
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return -EINVAL;
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/* Determine divider value */
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@ -215,12 +218,18 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler)
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return div ? (int)div->fdr : -EINVAL;
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}
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static void mpc_i2c_setclock_52xx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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{
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int ret, fdr;
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if (clock == MPC_I2C_CLOCK_PRESERVE) {
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dev_dbg(i2c->dev, "using fdr %d\n",
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readb(i2c->base + MPC_I2C_FDR));
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return;
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}
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ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler);
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fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
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@ -229,16 +238,52 @@ static void mpc_i2c_setclock_52xx(struct device_node *node,
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if (ret >= 0)
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dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr);
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}
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#else /* !CONFIG_PPC_MPC52xx */
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static void mpc_i2c_setclock_52xx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
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static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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{
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}
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#endif /* CONFIG_PPC_MPC52xx*/
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#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */
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#ifdef CONFIG_PPC_MPC512x
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static void __devinit mpc_i2c_setup_512x(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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{
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struct device_node *node_ctrl;
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void __iomem *ctrl;
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const u32 *pval;
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u32 idx;
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/* Enable I2C interrupts for mpc5121 */
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node_ctrl = of_find_compatible_node(NULL, NULL,
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"fsl,mpc5121-i2c-ctrl");
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if (node_ctrl) {
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ctrl = of_iomap(node_ctrl, 0);
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if (ctrl) {
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/* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */
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pval = of_get_property(node, "reg", NULL);
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idx = (*pval & 0xff) / 0x20;
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setbits32(ctrl, 1 << (24 + idx * 2));
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iounmap(ctrl);
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}
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of_node_put(node_ctrl);
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}
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/* The clock setup for the 52xx works also fine for the 512x */
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mpc_i2c_setup_52xx(node, i2c, clock, prescaler);
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}
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#else /* CONFIG_PPC_MPC512x */
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static void __devinit mpc_i2c_setup_512x(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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{
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}
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#endif /* CONFIG_PPC_MPC512x */
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#ifdef CONFIG_FSL_SOC
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static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
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static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = {
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{160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123},
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{288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102},
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{416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127},
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@ -258,7 +303,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = {
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{49152, 0x011e}, {61440, 0x011f}
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};
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u32 mpc_i2c_get_sec_cfg_8xxx(void)
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static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
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{
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struct device_node *node = NULL;
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u32 __iomem *reg;
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@ -287,13 +332,14 @@ u32 mpc_i2c_get_sec_cfg_8xxx(void)
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return val;
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}
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int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
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static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
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u32 prescaler)
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{
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const struct mpc_i2c_divider *div = NULL;
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u32 divider;
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int i;
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if (!clock)
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if (clock == MPC_I2C_CLOCK_LEGACY)
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return -EINVAL;
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/* Determine proper divider value */
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@ -320,12 +366,19 @@ int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler)
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return div ? (int)div->fdr : -EINVAL;
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}
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static void mpc_i2c_setclock_8xxx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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{
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int ret, fdr;
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if (clock == MPC_I2C_CLOCK_PRESERVE) {
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dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n",
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readb(i2c->base + MPC_I2C_DFSRR),
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readb(i2c->base + MPC_I2C_FDR));
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return;
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}
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ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler);
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fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
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@ -338,9 +391,9 @@ static void mpc_i2c_setclock_8xxx(struct device_node *node,
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}
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#else /* !CONFIG_FSL_SOC */
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static void mpc_i2c_setclock_8xxx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
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struct mpc_i2c *i2c,
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u32 clock, u32 prescaler)
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{
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}
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#endif /* CONFIG_FSL_SOC */
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@ -494,7 +547,7 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
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{
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struct mpc_i2c *i2c;
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const u32 *prop;
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u32 clock = 0;
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u32 clock = MPC_I2C_CLOCK_LEGACY;
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int result = 0;
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int plen;
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@ -523,21 +576,21 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
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}
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}
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if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
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if (of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
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clock = MPC_I2C_CLOCK_PRESERVE;
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} else {
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prop = of_get_property(op->node, "clock-frequency", &plen);
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if (prop && plen == sizeof(u32))
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clock = *prop;
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}
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if (match->data) {
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struct mpc_i2c_match_data *data =
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(struct mpc_i2c_match_data *)match->data;
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data->setclock(op->node, i2c, clock, data->prescaler);
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} else {
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/* Backwards compatibility */
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if (of_get_property(op->node, "dfsrr", NULL))
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mpc_i2c_setclock_8xxx(op->node, i2c,
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clock, 0);
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}
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if (match->data) {
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struct mpc_i2c_data *data = match->data;
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data->setup(op->node, i2c, clock, data->prescaler);
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} else {
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/* Backwards compatibility */
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if (of_get_property(op->node, "dfsrr", NULL))
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mpc_i2c_setup_8xxx(op->node, i2c, clock, 0);
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}
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dev_set_drvdata(&op->dev, i2c);
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@ -582,47 +635,42 @@ static int __devexit fsl_i2c_remove(struct of_device *op)
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return 0;
|
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};
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static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = {
|
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.setup = mpc_i2c_setup_512x,
|
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};
|
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|
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static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = {
|
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.setup = mpc_i2c_setup_52xx,
|
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};
|
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|
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static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = {
|
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.setup = mpc_i2c_setup_8xxx,
|
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};
|
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|
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static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = {
|
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.setup = mpc_i2c_setup_8xxx,
|
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.prescaler = 2,
|
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};
|
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|
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static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = {
|
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.setup = mpc_i2c_setup_8xxx,
|
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.prescaler = 3,
|
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};
|
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|
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static const struct of_device_id mpc_i2c_of_match[] = {
|
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{.compatible = "mpc5200-i2c",
|
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.data = &(struct mpc_i2c_match_data) {
|
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.setclock = mpc_i2c_setclock_52xx,
|
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},
|
||||
},
|
||||
{.compatible = "fsl,mpc5200b-i2c",
|
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.data = &(struct mpc_i2c_match_data) {
|
||||
.setclock = mpc_i2c_setclock_52xx,
|
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},
|
||||
},
|
||||
{.compatible = "fsl,mpc5200-i2c",
|
||||
.data = &(struct mpc_i2c_match_data) {
|
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.setclock = mpc_i2c_setclock_52xx,
|
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},
|
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},
|
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{.compatible = "fsl,mpc8313-i2c",
|
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.data = &(struct mpc_i2c_match_data) {
|
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.setclock = mpc_i2c_setclock_8xxx,
|
||||
},
|
||||
},
|
||||
{.compatible = "fsl,mpc8543-i2c",
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.data = &(struct mpc_i2c_match_data) {
|
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.setclock = mpc_i2c_setclock_8xxx,
|
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.prescaler = 2,
|
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},
|
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},
|
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{.compatible = "fsl,mpc8544-i2c",
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.data = &(struct mpc_i2c_match_data) {
|
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.setclock = mpc_i2c_setclock_8xxx,
|
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.prescaler = 3,
|
||||
},
|
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{.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
|
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{.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
|
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{.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
|
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{.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
|
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{.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
|
||||
{.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
|
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{.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
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||||
/* Backward compatibility */
|
||||
},
|
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{.compatible = "fsl-i2c", },
|
||||
{},
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
|
||||
|
||||
|
||||
/* Structure for a device driver */
|
||||
static struct of_platform_driver mpc_i2c_driver = {
|
||||
.match_table = mpc_i2c_of_match,
|
||||
|
|
@ -655,5 +703,5 @@ module_exit(fsl_i2c_exit);
|
|||
|
||||
MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
|
||||
MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
|
||||
"MPC824x/85xx/52xx processors");
|
||||
"MPC824x/83xx/85xx/86xx/512x/52xx processors");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
|
|||
Loading…
Reference in a new issue