Merge branches 'pxa-ian' and 'pxa-xm270' into pxa
Conflicts: MAINTAINERS
This commit is contained in:
Russell King
Russell King
commit
a9da4f7ed6
14 changed files with 771 additions and 416 deletions
18
MAINTAINERS
18
MAINTAINERS
|
|
@ -475,17 +475,17 @@ M: kernel@wantstofly.org
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|||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
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||||
S: Maintained
|
||||
|
||||
ARM/COMPULAB CM-X270/EM-X270 MACHINE SUPPORT
|
||||
P: Mike Rapoport
|
||||
M: mike@compulab.co.il
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||||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
|
||||
S: Maintained
|
||||
|
||||
ARM/CORGI MACHINE SUPPORT
|
||||
P: Richard Purdie
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||||
M: rpurdie@rpsys.net
|
||||
S: Maintained
|
||||
|
||||
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
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||||
P: Lennert Buytenhek
|
||||
M: kernel@wantstofly.org
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||||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
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||||
S: Maintained
|
||||
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||||
ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
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P: Daniel Ribeiro
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||||
M: drwyrm@gmail.com
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||||
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@ -497,6 +497,12 @@ L: openezx-devel@lists.openezx.org (subscribers-only)
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|||
W: http://www.openezx.org/
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||||
S: Maintained
|
||||
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||||
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
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||||
P: Lennert Buytenhek
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||||
M: kernel@wantstofly.org
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||||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
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||||
S: Maintained
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||||
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ARM/GUMSTIX MACHINE SUPPORT
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||||
P: Steve Sakoman
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||||
M: sakoman@gmail.com
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||||
|
|
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@ -627,7 +627,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
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if (!sachip)
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return -ENOMEM;
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sachip->clk = clk_get(me, "GPIO27_CLK");
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sachip->clk = clk_get(me, "SA1111_CLK");
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if (!sachip->clk) {
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ret = PTR_ERR(sachip->clk);
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goto err_free;
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@ -101,21 +101,6 @@ unsigned long clk_get_rate(struct clk *clk)
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EXPORT_SYMBOL(clk_get_rate);
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static void clk_gpio27_enable(struct clk *clk)
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{
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pxa_gpio_mode(GPIO11_3_6MHz_MD);
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}
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static void clk_gpio27_disable(struct clk *clk)
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{
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}
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static const struct clkops clk_gpio27_ops = {
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.enable = clk_gpio27_enable,
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.disable = clk_gpio27_disable,
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};
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void clk_cken_enable(struct clk *clk)
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{
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CKEN |= 1 << clk->cken;
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@ -131,14 +116,6 @@ const struct clkops clk_cken_ops = {
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.disable = clk_cken_disable,
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};
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static struct clk common_clks[] = {
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{
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.name = "GPIO27_CLK",
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.ops = &clk_gpio27_ops,
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.rate = 3686400,
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},
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};
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void clks_register(struct clk *clks, size_t num)
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{
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int i;
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@ -148,10 +125,3 @@ void clks_register(struct clk *clks, size_t num)
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list_add(&clks[i].node, &clocks);
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mutex_unlock(&clocks_mutex);
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}
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static int __init clk_init(void)
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{
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clks_register(common_clks, ARRAY_SIZE(common_clks));
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return 0;
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}
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arch_initcall(clk_init);
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@ -47,6 +47,15 @@ struct clk {
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.other = _other, \
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}
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#define INIT_CLK(_name, _ops, _rate, _delay, _dev) \
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{ \
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.name = _name, \
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.dev = _dev, \
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.ops = _ops, \
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.rate = _rate, \
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.delay = _delay, \
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}
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extern const struct clkops clk_cken_ops;
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void clk_cken_enable(struct clk *clk);
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@ -5,7 +5,7 @@
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*
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* Bits taken from various places.
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*
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* Copyright (C) 2007 Compulab, Ltd.
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* Copyright (C) 2007, 2008 Compulab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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@ -19,16 +19,16 @@
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <asm/mach/pci.h>
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#include <asm/arch/cm-x270.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa2xx-gpio.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/it8152.h>
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unsigned long it8152_base_address = CMX270_IT8152_VIRT;
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unsigned long it8152_base_address;
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static int cmx270_it8152_irq_gpio;
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/*
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* Only first 64MB of memory can be accessed via PCI.
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@ -42,7 +42,7 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
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unsigned int sz = SZ_64M >> PAGE_SHIFT;
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if (machine_is_armcore()) {
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pr_info("Adjusting zones for CM-x270\n");
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pr_info("Adjusting zones for CM-X270\n");
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/*
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* Only adjust if > 64M on current system
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@ -60,19 +60,20 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
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static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
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{
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/* clear our parent irq */
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GEDR(GPIO_IT8152_IRQ) = GPIO_bit(GPIO_IT8152_IRQ);
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GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio);
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it8152_irq_demux(irq, desc);
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}
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void __cmx270_pci_init_irq(void)
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void __cmx270_pci_init_irq(int irq_gpio)
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{
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it8152_init_irq();
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pxa_gpio_mode(IRQ_TO_GPIO(GPIO_IT8152_IRQ));
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set_irq_type(IRQ_GPIO(GPIO_IT8152_IRQ), IRQT_RISING);
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set_irq_chained_handler(IRQ_GPIO(GPIO_IT8152_IRQ),
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cmx270_it8152_irq_demux);
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cmx270_it8152_irq_gpio = irq_gpio;
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set_irq_type(gpio_to_irq(irq_gpio), IRQT_RISING);
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set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux);
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}
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#ifdef CONFIG_PM
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@ -115,8 +116,8 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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/*
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Here comes the ugly part. The routing is baseboard specific,
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but defining a platform for each possible base of CM-x270 is
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unrealistic. Here we keep mapping for ATXBase and SB-x270.
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but defining a platform for each possible base of CM-X270 is
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unrealistic. Here we keep mapping for ATXBase and SB-X270.
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*/
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/* ATXBASE PCI slot */
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if (slot == 7)
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|
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@ -1,13 +1,13 @@
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extern void __cmx270_pci_init_irq(void);
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extern void __cmx270_pci_init_irq(int irq_gpio);
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extern void __cmx270_pci_suspend(void);
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extern void __cmx270_pci_resume(void);
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#ifdef CONFIG_PCI
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#define cmx270_pci_init_irq __cmx270_pci_init_irq
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#define cmx270_pci_suspend __cmx270_pci_suspend
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#define cmx270_pci_resume __cmx270_pci_resume
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#define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x)
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#define cmx270_pci_suspend(x) __cmx270_pci_suspend(x)
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#define cmx270_pci_resume(x) __cmx270_pci_resume(x)
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#else
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#define cmx270_pci_init_irq() do {} while (0)
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#define cmx270_pci_suspend() do {} while (0)
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#define cmx270_pci_resume() do {} while (0)
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#define cmx270_pci_init_irq(x) do {} while (0)
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#define cmx270_pci_suspend(x) do {} while (0)
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#define cmx270_pci_resume(x) do {} while (0)
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#endif
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@ -1,7 +1,7 @@
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/*
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* linux/arch/arm/mach-pxa/cm-x270.c
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*
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* Copyright (C) 2007 CompuLab, Ltd.
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* Copyright (C) 2007, 2008 CompuLab, Ltd.
|
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* Mike Rapoport <mike@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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@ -9,44 +9,156 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/pm.h>
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#include <linux/fb.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/sysdev.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/dm9000.h>
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#include <linux/rtc-v3020.h>
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#include <linux/serial_8250.h>
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#include <video/mbxfb.h>
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#include <linux/leds.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pxa2xx-regs.h>
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#include <asm/arch/pxa2xx-gpio.h>
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#include <asm/arch/mfp-pxa27x.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/audio.h>
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#include <asm/arch/pxafb.h>
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#include <asm/arch/ohci.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/bitfield.h>
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#include <asm/arch/cm-x270.h>
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#include <asm/hardware/it8152.h>
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#include "generic.h"
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#include "cm-x270-pci.h"
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/* virtual addresses for statically mapped regions */
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#define CMX270_VIRT_BASE (0xe8000000)
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#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
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#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
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#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
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static struct resource cmx270_dm9k_resource[] = {
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/* GPIO IRQ usage */
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#define GPIO10_ETHIRQ (10)
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#define GPIO22_IT8152_IRQ (22)
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#define GPIO83_MMC_IRQ (83)
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#define GPIO95_GFXIRQ (95)
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|
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#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
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#define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ)
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#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ)
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#define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ)
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|
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/* MMC power enable */
|
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#define GPIO105_MMC_POWER (105)
|
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|
||||
static unsigned long cmx270_pin_config[] = {
|
||||
/* AC'97 */
|
||||
GPIO28_AC97_BITCLK,
|
||||
GPIO29_AC97_SDATA_IN_0,
|
||||
GPIO30_AC97_SDATA_OUT,
|
||||
GPIO31_AC97_SYNC,
|
||||
GPIO98_AC97_SYSCLK,
|
||||
GPIO113_AC97_nRESET,
|
||||
|
||||
/* BTUART */
|
||||
GPIO42_BTUART_RXD,
|
||||
GPIO43_BTUART_TXD,
|
||||
GPIO44_BTUART_CTS,
|
||||
GPIO45_BTUART_RTS,
|
||||
|
||||
/* STUART */
|
||||
GPIO46_STUART_RXD,
|
||||
GPIO47_STUART_TXD,
|
||||
|
||||
/* MCI controller */
|
||||
GPIO32_MMC_CLK,
|
||||
GPIO112_MMC_CMD,
|
||||
GPIO92_MMC_DAT_0,
|
||||
GPIO109_MMC_DAT_1,
|
||||
GPIO110_MMC_DAT_2,
|
||||
GPIO111_MMC_DAT_3,
|
||||
|
||||
/* LCD */
|
||||
GPIO58_LCD_LDD_0,
|
||||
GPIO59_LCD_LDD_1,
|
||||
GPIO60_LCD_LDD_2,
|
||||
GPIO61_LCD_LDD_3,
|
||||
GPIO62_LCD_LDD_4,
|
||||
GPIO63_LCD_LDD_5,
|
||||
GPIO64_LCD_LDD_6,
|
||||
GPIO65_LCD_LDD_7,
|
||||
GPIO66_LCD_LDD_8,
|
||||
GPIO67_LCD_LDD_9,
|
||||
GPIO68_LCD_LDD_10,
|
||||
GPIO69_LCD_LDD_11,
|
||||
GPIO70_LCD_LDD_12,
|
||||
GPIO71_LCD_LDD_13,
|
||||
GPIO72_LCD_LDD_14,
|
||||
GPIO73_LCD_LDD_15,
|
||||
GPIO74_LCD_FCLK,
|
||||
GPIO75_LCD_LCLK,
|
||||
GPIO76_LCD_PCLK,
|
||||
GPIO77_LCD_BIAS,
|
||||
|
||||
/* I2C */
|
||||
GPIO117_I2C_SCL,
|
||||
GPIO118_I2C_SDA,
|
||||
|
||||
/* SSP1 */
|
||||
GPIO23_SSP1_SCLK,
|
||||
GPIO24_SSP1_SFRM,
|
||||
GPIO25_SSP1_TXD,
|
||||
GPIO26_SSP1_RXD,
|
||||
|
||||
/* SSP2 */
|
||||
GPIO19_SSP2_SCLK,
|
||||
GPIO14_SSP2_SFRM,
|
||||
GPIO87_SSP2_TXD,
|
||||
GPIO88_SSP2_RXD,
|
||||
|
||||
/* PC Card */
|
||||
GPIO48_nPOE,
|
||||
GPIO49_nPWE,
|
||||
GPIO50_nPIOR,
|
||||
GPIO51_nPIOW,
|
||||
GPIO85_nPCE_1,
|
||||
GPIO54_nPCE_2,
|
||||
GPIO55_nPREG,
|
||||
GPIO56_nPWAIT,
|
||||
GPIO57_nIOIS16,
|
||||
|
||||
/* SDRAM and local bus */
|
||||
GPIO15_nCS_1,
|
||||
GPIO78_nCS_2,
|
||||
GPIO79_nCS_3,
|
||||
GPIO80_nCS_4,
|
||||
GPIO33_nCS_5,
|
||||
GPIO49_nPWE,
|
||||
GPIO18_RDY,
|
||||
|
||||
/* GPIO */
|
||||
GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
|
||||
GPIO105_GPIO | MFP_LPM_DRIVE_HIGH, /* MMC/SD power */
|
||||
GPIO53_GPIO, /* PC card reset */
|
||||
|
||||
/* NAND controls */
|
||||
GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
|
||||
GPIO89_GPIO, /* NAND Ready/Busy */
|
||||
|
||||
/* interrupts */
|
||||
GPIO10_GPIO, /* DM9000 interrupt */
|
||||
GPIO83_GPIO, /* MMC card detect */
|
||||
};
|
||||
|
||||
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
|
||||
static struct resource cmx270_dm9000_resource[] = {
|
||||
[0] = {
|
||||
.start = DM9000_PHYS_BASE,
|
||||
.end = DM9000_PHYS_BASE + 4,
|
||||
|
|
@ -64,31 +176,45 @@ static struct resource cmx270_dm9k_resource[] = {
|
|||
}
|
||||
};
|
||||
|
||||
/* for the moment we limit ourselves to 32bit IO until some
|
||||
* better IO routines can be written and tested
|
||||
*/
|
||||
static struct dm9000_plat_data cmx270_dm9k_platdata = {
|
||||
static struct dm9000_plat_data cmx270_dm9000_platdata = {
|
||||
.flags = DM9000_PLATF_32BITONLY,
|
||||
};
|
||||
|
||||
/* Ethernet device */
|
||||
static struct platform_device cmx270_device_dm9k = {
|
||||
static struct platform_device cmx270_dm9000_device = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(cmx270_dm9k_resource),
|
||||
.resource = cmx270_dm9k_resource,
|
||||
.num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
|
||||
.resource = cmx270_dm9000_resource,
|
||||
.dev = {
|
||||
.platform_data = &cmx270_dm9k_platdata,
|
||||
.platform_data = &cmx270_dm9000_platdata,
|
||||
}
|
||||
};
|
||||
|
||||
/* touchscreen controller */
|
||||
static void __init cmx270_init_dm9000(void)
|
||||
{
|
||||
platform_device_register(&cmx270_dm9000_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_dm9000(void) {}
|
||||
#endif
|
||||
|
||||
/* UCB1400 touchscreen controller */
|
||||
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
|
||||
static struct platform_device cmx270_ts_device = {
|
||||
.name = "ucb1400_ts",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
/* RTC */
|
||||
static void __init cmx270_init_touchscreen(void)
|
||||
{
|
||||
platform_device_register(&cmx270_ts_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_touchscreen(void) {}
|
||||
#endif
|
||||
|
||||
/* V3020 RTC */
|
||||
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
|
||||
static struct resource cmx270_v3020_resource[] = {
|
||||
[0] = {
|
||||
.start = RTC_PHYS_BASE,
|
||||
|
|
@ -111,28 +237,67 @@ static struct platform_device cmx270_rtc_device = {
|
|||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* CM-X270 LEDs
|
||||
*/
|
||||
static struct platform_device cmx270_led_device = {
|
||||
.name = "cm-x270-led",
|
||||
.id = -1,
|
||||
static void __init cmx270_init_rtc(void)
|
||||
{
|
||||
platform_device_register(&cmx270_rtc_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_rtc(void) {}
|
||||
#endif
|
||||
|
||||
/* CM-X270 LEDs */
|
||||
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
|
||||
static struct gpio_led cmx270_leds[] = {
|
||||
[0] = {
|
||||
.name = "cm-x270:red",
|
||||
.default_trigger = "nand-disk",
|
||||
.gpio = 93,
|
||||
.active_low = 1,
|
||||
},
|
||||
[1] = {
|
||||
.name = "cm-x270:green",
|
||||
.default_trigger = "heartbeat",
|
||||
.gpio = 94,
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
|
||||
.num_leds = ARRAY_SIZE(cmx270_leds),
|
||||
.leds = cmx270_leds,
|
||||
};
|
||||
|
||||
static struct platform_device cmx270_led_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &cmx270_gpio_led_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cmx270_init_leds(void)
|
||||
{
|
||||
platform_device_register(&cmx270_led_device);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_leds(void) {}
|
||||
#endif
|
||||
|
||||
/* 2700G graphics */
|
||||
#if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
|
||||
static u64 fb_dma_mask = ~(u64)0;
|
||||
|
||||
static struct resource cmx270_2700G_resource[] = {
|
||||
/* frame buffer memory including ODFB and External SDRAM */
|
||||
[0] = {
|
||||
.start = MARATHON_PHYS,
|
||||
.end = MARATHON_PHYS + 0x02000000,
|
||||
.start = PXA_CS2_PHYS,
|
||||
.end = PXA_CS2_PHYS + 0x01ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
/* Marathon registers */
|
||||
[1] = {
|
||||
.start = MARATHON_PHYS + 0x03fe0000,
|
||||
.end = MARATHON_PHYS + 0x03ffffff,
|
||||
.start = PXA_CS2_PHYS + 0x03fe0000,
|
||||
.end = PXA_CS2_PHYS + 0x03ffffff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
|
@ -200,43 +365,15 @@ static struct platform_device cmx270_2700G = {
|
|||
.id = -1,
|
||||
};
|
||||
|
||||
static u64 ata_dma_mask = ~(u64)0;
|
||||
|
||||
static struct platform_device cmx270_ata = {
|
||||
.name = "pata_cm_x270",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &ata_dma_mask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
},
|
||||
};
|
||||
|
||||
/* platform devices */
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&cmx270_device_dm9k,
|
||||
&cmx270_rtc_device,
|
||||
&cmx270_2700G,
|
||||
&cmx270_led_device,
|
||||
&cmx270_ts_device,
|
||||
&cmx270_ata,
|
||||
};
|
||||
|
||||
/* Map PCI companion and IDE/General Purpose CS statically */
|
||||
static struct map_desc cmx270_io_desc[] __initdata = {
|
||||
[0] = { /* IDE/general purpose space */
|
||||
.virtual = CMX270_IDE104_VIRT,
|
||||
.pfn = __phys_to_pfn(CMX270_IDE104_PHYS),
|
||||
.length = SZ_64M - SZ_8M,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
[1] = { /* PCI bridge */
|
||||
.virtual = CMX270_IT8152_VIRT,
|
||||
.pfn = __phys_to_pfn(CMX270_IT8152_PHYS),
|
||||
.length = SZ_64M,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
static void __init cmx270_init_2700G(void)
|
||||
{
|
||||
platform_device_register(&cmx270_2700G);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_2700G(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
|
||||
/*
|
||||
Display definitions
|
||||
keep these for backwards compatibility, although symbolic names (as
|
||||
|
|
@ -446,7 +583,16 @@ static int __init cmx270_set_display(char *str)
|
|||
*/
|
||||
__setup("monitor=", cmx270_set_display);
|
||||
|
||||
static void __init cmx270_init_display(void)
|
||||
{
|
||||
set_pxa_fb_info(cmx270_display);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_display(void) {}
|
||||
#endif
|
||||
|
||||
/* PXA27x OHCI controller setup */
|
||||
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
||||
static int cmx270_ohci_init(struct device *dev)
|
||||
{
|
||||
/* Set the Power Control Polarity Low */
|
||||
|
|
@ -461,35 +607,37 @@ static struct pxaohci_platform_data cmx270_ohci_platform_data = {
|
|||
.init = cmx270_ohci_init,
|
||||
};
|
||||
|
||||
static void __init cmx270_init_ohci(void)
|
||||
{
|
||||
pxa_set_ohci_info(&cmx270_ohci_platform_data);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_ohci(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
|
||||
static int cmx270_mci_init(struct device *dev,
|
||||
irq_handler_t cmx270_detect_int,
|
||||
void *data)
|
||||
{
|
||||
int err;
|
||||
|
||||
/*
|
||||
* setup GPIO for PXA27x MMC controller
|
||||
*/
|
||||
pxa_gpio_mode(GPIO32_MMCCLK_MD);
|
||||
pxa_gpio_mode(GPIO112_MMCCMD_MD);
|
||||
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
|
||||
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
|
||||
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
|
||||
pxa_gpio_mode(GPIO111_MMCDAT3_MD);
|
||||
err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
|
||||
if (err) {
|
||||
dev_warn(dev, "power gpio unavailable\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
/* SB-X270 uses GPIO105 as SD power enable */
|
||||
pxa_gpio_mode(105 | GPIO_OUT);
|
||||
|
||||
/* card detect IRQ on GPIO 83 */
|
||||
pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
|
||||
gpio_direction_output(GPIO105_MMC_POWER, 0);
|
||||
|
||||
err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
|
||||
IRQF_DISABLED | IRQF_TRIGGER_FALLING,
|
||||
"MMC card detect", data);
|
||||
if (err)
|
||||
printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
|
||||
if (err) {
|
||||
gpio_free(GPIO105_MMC_POWER);
|
||||
dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
|
||||
" request MMC card detect IRQ\n");
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
|
@ -499,17 +647,18 @@ static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
|
|||
struct pxamci_platform_data *p_d = dev->platform_data;
|
||||
|
||||
if ((1 << vdd) & p_d->ocr_mask) {
|
||||
printk(KERN_DEBUG "%s: on\n", __func__);
|
||||
GPCR(105) = GPIO_bit(105);
|
||||
dev_dbg(dev, "power on\n");
|
||||
gpio_set_value(GPIO105_MMC_POWER, 0);
|
||||
} else {
|
||||
GPSR(105) = GPIO_bit(105);
|
||||
printk(KERN_DEBUG "%s: off\n", __func__);
|
||||
gpio_set_value(GPIO105_MMC_POWER, 1);
|
||||
dev_dbg(dev, "power off\n");
|
||||
}
|
||||
}
|
||||
|
||||
static void cmx270_mci_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(CMX270_MMC_IRQ, data);
|
||||
gpio_free(GPIO105_MMC_POWER);
|
||||
}
|
||||
|
||||
static struct pxamci_platform_data cmx270_mci_platform_data = {
|
||||
|
|
@ -519,6 +668,14 @@ static struct pxamci_platform_data cmx270_mci_platform_data = {
|
|||
.exit = cmx270_mci_exit,
|
||||
};
|
||||
|
||||
static void __init cmx270_init_mmc(void)
|
||||
{
|
||||
pxa_set_mci_info(&cmx270_mci_platform_data);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_mmc(void) {}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static unsigned long sleep_save_msc[10];
|
||||
|
||||
|
|
@ -580,53 +737,63 @@ static int __init cmx270_pm_init(void)
|
|||
static int __init cmx270_pm_init(void) { return 0; }
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
|
||||
static void __init cmx270_init_ac97(void)
|
||||
{
|
||||
pxa_set_ac97_info(NULL);
|
||||
}
|
||||
#else
|
||||
static inline void cmx270_init_ac97(void) {}
|
||||
#endif
|
||||
|
||||
static void __init cmx270_init(void)
|
||||
{
|
||||
cmx270_pm_init();
|
||||
|
||||
set_pxa_fb_info(cmx270_display);
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
|
||||
|
||||
/* register CM-X270 platform devices */
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
pxa_set_ac97_info(NULL);
|
||||
|
||||
/* set MCI and OHCI platform parameters */
|
||||
pxa_set_mci_info(&cmx270_mci_platform_data);
|
||||
pxa_set_ohci_info(&cmx270_ohci_platform_data);
|
||||
|
||||
/* This enables the STUART */
|
||||
pxa_gpio_mode(GPIO46_STRXD_MD);
|
||||
pxa_gpio_mode(GPIO47_STTXD_MD);
|
||||
|
||||
/* This enables the BTUART */
|
||||
pxa_gpio_mode(GPIO42_BTRXD_MD);
|
||||
pxa_gpio_mode(GPIO43_BTTXD_MD);
|
||||
pxa_gpio_mode(GPIO44_BTCTS_MD);
|
||||
pxa_gpio_mode(GPIO45_BTRTS_MD);
|
||||
cmx270_init_dm9000();
|
||||
cmx270_init_rtc();
|
||||
cmx270_init_display();
|
||||
cmx270_init_mmc();
|
||||
cmx270_init_ohci();
|
||||
cmx270_init_ac97();
|
||||
cmx270_init_touchscreen();
|
||||
cmx270_init_leds();
|
||||
cmx270_init_2700G();
|
||||
}
|
||||
|
||||
static void __init cmx270_init_irq(void)
|
||||
{
|
||||
pxa27x_init_irq();
|
||||
|
||||
|
||||
cmx270_pci_init_irq();
|
||||
|
||||
/* Setup interrupt for dm9000 */
|
||||
pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
|
||||
set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
|
||||
|
||||
/* Setup interrupt for 2700G */
|
||||
pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
|
||||
set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
|
||||
cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* Map PCI companion statically */
|
||||
static struct map_desc cmx270_io_desc[] __initdata = {
|
||||
[0] = { /* PCI bridge */
|
||||
.virtual = CMX270_IT8152_VIRT,
|
||||
.pfn = __phys_to_pfn(PXA_CS4_PHYS),
|
||||
.length = SZ_64M,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
||||
static void __init cmx270_map_io(void)
|
||||
{
|
||||
pxa_map_io();
|
||||
iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
|
||||
}
|
||||
|
||||
it8152_base_address = CMX270_IT8152_VIRT;
|
||||
}
|
||||
#else
|
||||
static void __init cmx270_map_io(void)
|
||||
{
|
||||
pxa_map_io();
|
||||
}
|
||||
#endif
|
||||
|
||||
MACHINE_START(ARMCORE, "Compulab CM-x270")
|
||||
.boot_params = 0xa0000100,
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Support for CompuLab EM-x270 platform
|
||||
* Support for CompuLab EM-X270 platform
|
||||
*
|
||||
* Copyright (C) 2007 CompuLab, Ltd.
|
||||
* Copyright (C) 2007, 2008 CompuLab, Ltd.
|
||||
* Author: Mike Rapoport <mike@compulab.co.il>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
|
@ -14,31 +14,159 @@
|
|||
|
||||
#include <linux/dm9000.h>
|
||||
#include <linux/rtc-v3020.h>
|
||||
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <asm/arch/mfp-pxa27x.h>
|
||||
#include <asm/arch/pxa-regs.h>
|
||||
#include <asm/arch/pxa2xx-gpio.h>
|
||||
#include <asm/arch/pxa27x-udc.h>
|
||||
#include <asm/arch/audio.h>
|
||||
#include <asm/arch/pxafb.h>
|
||||
#include <asm/arch/ohci.h>
|
||||
#include <asm/arch/mmc.h>
|
||||
#include <asm/arch/bitfield.h>
|
||||
#include <asm/arch/pxa27x_keypad.h>
|
||||
|
||||
#include "generic.h"
|
||||
|
||||
/* GPIO IRQ usage */
|
||||
#define EM_X270_MMC_PD (105)
|
||||
#define EM_X270_ETHIRQ IRQ_GPIO(41)
|
||||
#define EM_X270_MMC_IRQ IRQ_GPIO(13)
|
||||
#define GPIO41_ETHIRQ (41)
|
||||
#define GPIO13_MMC_CD (13)
|
||||
#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ)
|
||||
#define EM_X270_MMC_CD IRQ_GPIO(GPIO13_MMC_CD)
|
||||
|
||||
static struct resource em_x270_dm9k_resource[] = {
|
||||
/* NAND control GPIOs */
|
||||
#define GPIO11_NAND_CS (11)
|
||||
#define GPIO56_NAND_RB (56)
|
||||
|
||||
static unsigned long em_x270_pin_config[] = {
|
||||
/* AC'97 */
|
||||
GPIO28_AC97_BITCLK,
|
||||
GPIO29_AC97_SDATA_IN_0,
|
||||
GPIO30_AC97_SDATA_OUT,
|
||||
GPIO31_AC97_SYNC,
|
||||
GPIO98_AC97_SYSCLK,
|
||||
GPIO113_AC97_nRESET,
|
||||
|
||||
/* BTUART */
|
||||
GPIO42_BTUART_RXD,
|
||||
GPIO43_BTUART_TXD,
|
||||
GPIO44_BTUART_CTS,
|
||||
GPIO45_BTUART_RTS,
|
||||
|
||||
/* STUART */
|
||||
GPIO46_STUART_RXD,
|
||||
GPIO47_STUART_TXD,
|
||||
|
||||
/* MCI controller */
|
||||
GPIO32_MMC_CLK,
|
||||
GPIO112_MMC_CMD,
|
||||
GPIO92_MMC_DAT_0,
|
||||
GPIO109_MMC_DAT_1,
|
||||
GPIO110_MMC_DAT_2,
|
||||
GPIO111_MMC_DAT_3,
|
||||
|
||||
/* LCD */
|
||||
GPIO58_LCD_LDD_0,
|
||||
GPIO59_LCD_LDD_1,
|
||||
GPIO60_LCD_LDD_2,
|
||||
GPIO61_LCD_LDD_3,
|
||||
GPIO62_LCD_LDD_4,
|
||||
GPIO63_LCD_LDD_5,
|
||||
GPIO64_LCD_LDD_6,
|
||||
GPIO65_LCD_LDD_7,
|
||||
GPIO66_LCD_LDD_8,
|
||||
GPIO67_LCD_LDD_9,
|
||||
GPIO68_LCD_LDD_10,
|
||||
GPIO69_LCD_LDD_11,
|
||||
GPIO70_LCD_LDD_12,
|
||||
GPIO71_LCD_LDD_13,
|
||||
GPIO72_LCD_LDD_14,
|
||||
GPIO73_LCD_LDD_15,
|
||||
GPIO74_LCD_FCLK,
|
||||
GPIO75_LCD_LCLK,
|
||||
GPIO76_LCD_PCLK,
|
||||
GPIO77_LCD_BIAS,
|
||||
|
||||
/* QCI */
|
||||
GPIO84_CIF_FV,
|
||||
GPIO25_CIF_LV,
|
||||
GPIO53_CIF_MCLK,
|
||||
GPIO54_CIF_PCLK,
|
||||
GPIO81_CIF_DD_0,
|
||||
GPIO55_CIF_DD_1,
|
||||
GPIO51_CIF_DD_2,
|
||||
GPIO50_CIF_DD_3,
|
||||
GPIO52_CIF_DD_4,
|
||||
GPIO48_CIF_DD_5,
|
||||
GPIO17_CIF_DD_6,
|
||||
GPIO12_CIF_DD_7,
|
||||
|
||||
/* I2C */
|
||||
GPIO117_I2C_SCL,
|
||||
GPIO118_I2C_SDA,
|
||||
|
||||
/* Keypad */
|
||||
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO39_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO91_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO36_KP_MKIN_7 | WAKEUP_ON_LEVEL_HIGH,
|
||||
GPIO103_KP_MKOUT_0,
|
||||
GPIO104_KP_MKOUT_1,
|
||||
GPIO105_KP_MKOUT_2,
|
||||
GPIO106_KP_MKOUT_3,
|
||||
GPIO107_KP_MKOUT_4,
|
||||
GPIO108_KP_MKOUT_5,
|
||||
GPIO96_KP_MKOUT_6,
|
||||
GPIO22_KP_MKOUT_7,
|
||||
|
||||
/* SSP1 */
|
||||
GPIO26_SSP1_RXD,
|
||||
GPIO23_SSP1_SCLK,
|
||||
GPIO24_SSP1_SFRM,
|
||||
GPIO57_SSP1_TXD,
|
||||
|
||||
/* SSP2 */
|
||||
GPIO19_SSP2_SCLK,
|
||||
GPIO14_SSP2_SFRM,
|
||||
GPIO89_SSP2_TXD,
|
||||
GPIO88_SSP2_RXD,
|
||||
|
||||
/* SDRAM and local bus */
|
||||
GPIO15_nCS_1,
|
||||
GPIO78_nCS_2,
|
||||
GPIO79_nCS_3,
|
||||
GPIO80_nCS_4,
|
||||
GPIO49_nPWE,
|
||||
GPIO18_RDY,
|
||||
|
||||
/* GPIO */
|
||||
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
|
||||
|
||||
/* power controls */
|
||||
GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* GPRS_PWEN */
|
||||
GPIO115_GPIO | MFP_LPM_DRIVE_LOW, /* WLAN_PWEN */
|
||||
|
||||
/* NAND controls */
|
||||
GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
|
||||
GPIO56_GPIO, /* NAND Ready/Busy */
|
||||
|
||||
/* interrupts */
|
||||
GPIO13_GPIO, /* MMC card detect */
|
||||
GPIO41_GPIO, /* DM9000 interrupt */
|
||||
};
|
||||
|
||||
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
|
||||
static struct resource em_x270_dm9000_resource[] = {
|
||||
[0] = {
|
||||
.start = PXA_CS2_PHYS,
|
||||
.end = PXA_CS2_PHYS + 3,
|
||||
|
|
@ -56,32 +184,30 @@ static struct resource em_x270_dm9k_resource[] = {
|
|||
}
|
||||
};
|
||||
|
||||
/* for the moment we limit ourselves to 32bit IO until some
|
||||
* better IO routines can be written and tested
|
||||
*/
|
||||
static struct dm9000_plat_data em_x270_dm9k_platdata = {
|
||||
static struct dm9000_plat_data em_x270_dm9000_platdata = {
|
||||
.flags = DM9000_PLATF_32BITONLY,
|
||||
};
|
||||
|
||||
/* Ethernet device */
|
||||
static struct platform_device em_x270_dm9k = {
|
||||
static struct platform_device em_x270_dm9000 = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(em_x270_dm9k_resource),
|
||||
.resource = em_x270_dm9k_resource,
|
||||
.num_resources = ARRAY_SIZE(em_x270_dm9000_resource),
|
||||
.resource = em_x270_dm9000_resource,
|
||||
.dev = {
|
||||
.platform_data = &em_x270_dm9k_platdata,
|
||||
.platform_data = &em_x270_dm9000_platdata,
|
||||
}
|
||||
};
|
||||
|
||||
/* WM9712 touchscreen controller. Hopefully the driver will make it to
|
||||
* the mainstream sometime */
|
||||
static struct platform_device em_x270_ts = {
|
||||
.name = "wm97xx-ts",
|
||||
.id = -1,
|
||||
};
|
||||
static void __init em_x270_init_dm9000(void)
|
||||
{
|
||||
platform_device_register(&em_x270_dm9000);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_dm9000(void) {}
|
||||
#endif
|
||||
|
||||
/* RTC */
|
||||
/* V3020 RTC */
|
||||
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
|
||||
static struct resource em_x270_v3020_resource[] = {
|
||||
[0] = {
|
||||
.start = PXA_CS4_PHYS,
|
||||
|
|
@ -104,20 +230,26 @@ static struct platform_device em_x270_rtc = {
|
|||
}
|
||||
};
|
||||
|
||||
/* NAND flash */
|
||||
#define GPIO_NAND_CS (11)
|
||||
#define GPIO_NAND_RB (56)
|
||||
static void __init em_x270_init_rtc(void)
|
||||
{
|
||||
platform_device_register(&em_x270_rtc);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_rtc(void) {}
|
||||
#endif
|
||||
|
||||
/* NAND flash */
|
||||
#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
|
||||
static inline void nand_cs_on(void)
|
||||
{
|
||||
GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
|
||||
gpio_set_value(GPIO11_NAND_CS, 0);
|
||||
}
|
||||
|
||||
static void nand_cs_off(void)
|
||||
{
|
||||
dsb();
|
||||
|
||||
GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
|
||||
gpio_set_value(GPIO11_NAND_CS, 1);
|
||||
}
|
||||
|
||||
/* hardware specific access to control-lines */
|
||||
|
|
@ -157,7 +289,7 @@ static int em_x270_nand_device_ready(struct mtd_info *mtd)
|
|||
{
|
||||
dsb();
|
||||
|
||||
return GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB);
|
||||
return gpio_get_value(GPIO56_NAND_RB);
|
||||
}
|
||||
|
||||
static struct mtd_partition em_x270_partition_info[] = {
|
||||
|
|
@ -210,16 +342,35 @@ static struct platform_device em_x270_nand = {
|
|||
}
|
||||
};
|
||||
|
||||
/* platform devices */
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&em_x270_dm9k,
|
||||
&em_x270_ts,
|
||||
&em_x270_rtc,
|
||||
&em_x270_nand,
|
||||
};
|
||||
static void __init em_x270_init_nand(void)
|
||||
{
|
||||
int err;
|
||||
|
||||
err = gpio_request(GPIO11_NAND_CS, "NAND CS");
|
||||
if (err) {
|
||||
pr_warning("EM-X270: failed to request NAND CS gpio\n");
|
||||
return;
|
||||
}
|
||||
|
||||
gpio_direction_output(GPIO11_NAND_CS, 1);
|
||||
|
||||
err = gpio_request(GPIO56_NAND_RB, "NAND R/B");
|
||||
if (err) {
|
||||
pr_warning("EM-X270: failed to request NAND R/B gpio\n");
|
||||
gpio_free(GPIO11_NAND_CS);
|
||||
return;
|
||||
}
|
||||
|
||||
gpio_direction_input(GPIO56_NAND_RB);
|
||||
|
||||
platform_device_register(&em_x270_nand);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_nand(void) {}
|
||||
#endif
|
||||
|
||||
/* PXA27x OHCI controller setup */
|
||||
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
||||
static int em_x270_ohci_init(struct device *dev)
|
||||
{
|
||||
/* Set the Power Control Polarity Low */
|
||||
|
|
@ -237,25 +388,21 @@ static struct pxaohci_platform_data em_x270_ohci_platform_data = {
|
|||
.init = em_x270_ohci_init,
|
||||
};
|
||||
|
||||
static void __init em_x270_init_ohci(void)
|
||||
{
|
||||
pxa_set_ohci_info(&em_x270_ohci_platform_data);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_ohci(void) {}
|
||||
#endif
|
||||
|
||||
/* MCI controller setup */
|
||||
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
|
||||
static int em_x270_mci_init(struct device *dev,
|
||||
irq_handler_t em_x270_detect_int,
|
||||
void *data)
|
||||
{
|
||||
int err;
|
||||
|
||||
/* setup GPIO for PXA27x MMC controller */
|
||||
pxa_gpio_mode(GPIO32_MMCCLK_MD);
|
||||
pxa_gpio_mode(GPIO112_MMCCMD_MD);
|
||||
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
|
||||
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
|
||||
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
|
||||
pxa_gpio_mode(GPIO111_MMCDAT3_MD);
|
||||
|
||||
/* EM-X270 uses GPIO13 as SD power enable */
|
||||
pxa_gpio_mode(EM_X270_MMC_PD | GPIO_OUT);
|
||||
|
||||
err = request_irq(EM_X270_MMC_IRQ, em_x270_detect_int,
|
||||
int err = request_irq(EM_X270_MMC_CD, em_x270_detect_int,
|
||||
IRQF_DISABLED | IRQF_TRIGGER_FALLING,
|
||||
"MMC card detect", data);
|
||||
if (err) {
|
||||
|
|
@ -279,7 +426,8 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
|
|||
|
||||
static void em_x270_mci_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(EM_X270_MMC_IRQ, data);
|
||||
int irq = gpio_to_irq(GPIO13_MMC_CD);
|
||||
free_irq(irq, data);
|
||||
}
|
||||
|
||||
static struct pxamci_platform_data em_x270_mci_platform_data = {
|
||||
|
|
@ -289,7 +437,16 @@ static struct pxamci_platform_data em_x270_mci_platform_data = {
|
|||
.exit = em_x270_mci_exit,
|
||||
};
|
||||
|
||||
static void __init em_x270_init_mmc(void)
|
||||
{
|
||||
pxa_set_mci_info(&em_x270_mci_platform_data);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_mmc(void) {}
|
||||
#endif
|
||||
|
||||
/* LCD 480x640 */
|
||||
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
|
||||
static struct pxafb_mode_info em_x270_lcd_mode = {
|
||||
.pixclock = 50000,
|
||||
.bpp = 16,
|
||||
|
|
@ -307,40 +464,96 @@ static struct pxafb_mode_info em_x270_lcd_mode = {
|
|||
static struct pxafb_mach_info em_x270_lcd = {
|
||||
.modes = &em_x270_lcd_mode,
|
||||
.num_modes = 1,
|
||||
.cmap_inverse = 0,
|
||||
.cmap_static = 0,
|
||||
.lccr0 = LCCR0_PAS,
|
||||
.lccr3 = LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff),
|
||||
.lcd_conn = LCD_COLOR_TFT_16BPP,
|
||||
};
|
||||
static void __init em_x270_init_lcd(void)
|
||||
{
|
||||
set_pxa_fb_info(&em_x270_lcd);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_lcd(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
|
||||
static void __init em_x270_init_ac97(void)
|
||||
{
|
||||
pxa_set_ac97_info(NULL);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_ac97(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
|
||||
static unsigned int em_x270_matrix_keys[] = {
|
||||
KEY(0, 0, KEY_A), KEY(1, 0, KEY_UP), KEY(2, 1, KEY_B),
|
||||
KEY(0, 2, KEY_LEFT), KEY(1, 1, KEY_ENTER), KEY(2, 0, KEY_RIGHT),
|
||||
KEY(0, 1, KEY_C), KEY(1, 2, KEY_DOWN), KEY(2, 2, KEY_D),
|
||||
};
|
||||
|
||||
struct pxa27x_keypad_platform_data em_x270_keypad_info = {
|
||||
/* code map for the matrix keys */
|
||||
.matrix_key_rows = 3,
|
||||
.matrix_key_cols = 3,
|
||||
.matrix_key_map = em_x270_matrix_keys,
|
||||
.matrix_key_map_size = ARRAY_SIZE(em_x270_matrix_keys),
|
||||
};
|
||||
|
||||
static void __init em_x270_init_keypad(void)
|
||||
{
|
||||
pxa_set_keypad_info(&em_x270_keypad_info);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_keypad(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
|
||||
static struct gpio_keys_button gpio_keys_button[] = {
|
||||
[0] = {
|
||||
.desc = "sleep/wakeup",
|
||||
.code = KEY_SUSPEND,
|
||||
.type = EV_PWR,
|
||||
.gpio = 1,
|
||||
.wakeup = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data em_x270_gpio_keys_data = {
|
||||
.buttons = gpio_keys_button,
|
||||
.nbuttons = 1,
|
||||
};
|
||||
|
||||
static struct platform_device em_x270_gpio_keys = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &em_x270_gpio_keys_data,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init em_x270_init_gpio_keys(void)
|
||||
{
|
||||
platform_device_register(&em_x270_gpio_keys);
|
||||
}
|
||||
#else
|
||||
static inline void em_x270_init_gpio_keys(void) {}
|
||||
#endif
|
||||
|
||||
static void __init em_x270_init(void)
|
||||
{
|
||||
/* setup LCD */
|
||||
set_pxa_fb_info(&em_x270_lcd);
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config));
|
||||
|
||||
/* register EM-X270 platform devices */
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
pxa_set_ac97_info(NULL);
|
||||
|
||||
/* set MCI and OHCI platform parameters */
|
||||
pxa_set_mci_info(&em_x270_mci_platform_data);
|
||||
pxa_set_ohci_info(&em_x270_ohci_platform_data);
|
||||
|
||||
/* setup STUART GPIOs */
|
||||
pxa_gpio_mode(GPIO46_STRXD_MD);
|
||||
pxa_gpio_mode(GPIO47_STTXD_MD);
|
||||
|
||||
/* setup BTUART GPIOs */
|
||||
pxa_gpio_mode(GPIO42_BTRXD_MD);
|
||||
pxa_gpio_mode(GPIO43_BTTXD_MD);
|
||||
pxa_gpio_mode(GPIO44_BTCTS_MD);
|
||||
pxa_gpio_mode(GPIO45_BTRTS_MD);
|
||||
|
||||
/* Setup interrupt for dm9000 */
|
||||
set_irq_type(EM_X270_ETHIRQ, IRQT_RISING);
|
||||
em_x270_init_dm9000();
|
||||
em_x270_init_rtc();
|
||||
em_x270_init_nand();
|
||||
em_x270_init_lcd();
|
||||
em_x270_init_mmc();
|
||||
em_x270_init_ohci();
|
||||
em_x270_init_keypad();
|
||||
em_x270_init_gpio_keys();
|
||||
em_x270_init_ac97();
|
||||
}
|
||||
|
||||
MACHINE_START(EM_X270, "Compulab EM-x270")
|
||||
MACHINE_START(EM_X270, "Compulab EM-X270")
|
||||
.boot_params = 0xa0000100,
|
||||
.phys_io = 0x40000000,
|
||||
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
||||
|
|
|
|||
|
|
@ -109,6 +109,52 @@ static const struct clkops clk_pxa25x_lcd_ops = {
|
|||
.getrate = clk_pxa25x_lcd_getrate,
|
||||
};
|
||||
|
||||
static unsigned long gpio12_config_32k[] = {
|
||||
GPIO12_32KHz,
|
||||
};
|
||||
|
||||
static unsigned long gpio12_config_gpio[] = {
|
||||
GPIO12_GPIO,
|
||||
};
|
||||
|
||||
static void clk_gpio12_enable(struct clk *clk)
|
||||
{
|
||||
pxa2xx_mfp_config(gpio12_config_32k, 1);
|
||||
}
|
||||
|
||||
static void clk_gpio12_disable(struct clk *clk)
|
||||
{
|
||||
pxa2xx_mfp_config(gpio12_config_gpio, 1);
|
||||
}
|
||||
|
||||
static const struct clkops clk_pxa25x_gpio12_ops = {
|
||||
.enable = clk_gpio12_enable,
|
||||
.disable = clk_gpio12_disable,
|
||||
};
|
||||
|
||||
static unsigned long gpio11_config_3m6[] = {
|
||||
GPIO11_3_6MHz,
|
||||
};
|
||||
|
||||
static unsigned long gpio11_config_gpio[] = {
|
||||
GPIO11_GPIO,
|
||||
};
|
||||
|
||||
static void clk_gpio11_enable(struct clk *clk)
|
||||
{
|
||||
pxa2xx_mfp_config(gpio11_config_3m6, 1);
|
||||
}
|
||||
|
||||
static void clk_gpio11_disable(struct clk *clk)
|
||||
{
|
||||
pxa2xx_mfp_config(gpio11_config_gpio, 1);
|
||||
}
|
||||
|
||||
static const struct clkops clk_pxa25x_gpio11_ops = {
|
||||
.enable = clk_gpio11_enable,
|
||||
.disable = clk_gpio11_disable,
|
||||
};
|
||||
|
||||
/*
|
||||
* 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
|
||||
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
|
||||
|
|
@ -128,6 +174,8 @@ static struct clk pxa25x_clks[] = {
|
|||
INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
|
||||
INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
|
||||
INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev),
|
||||
INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL),
|
||||
INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL),
|
||||
INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
|
||||
INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
|
||||
|
||||
|
|
@ -145,7 +193,10 @@ static struct clk pxa25x_clks[] = {
|
|||
INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
|
||||
};
|
||||
|
||||
static struct clk gpio7_clk = INIT_CKOTHER("GPIO7_CK", &pxa25x_clks[4], NULL);
|
||||
static struct clk pxa2xx_clk_aliases[] = {
|
||||
INIT_CKOTHER("GPIO7_CLK", &pxa25x_clks[4], NULL),
|
||||
INIT_CKOTHER("SA1111_CLK", &pxa25x_clks[5], NULL),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
|
|
@ -293,7 +344,7 @@ static int __init pxa25x_init(void)
|
|||
int i, ret = 0;
|
||||
|
||||
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
|
||||
if (cpu_is_pxa25x())
|
||||
if (cpu_is_pxa255())
|
||||
clks_register(&pxa25x_hwuart_clk, 1);
|
||||
|
||||
if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
|
||||
|
|
@ -317,10 +368,10 @@ static int __init pxa25x_init(void)
|
|||
}
|
||||
|
||||
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
|
||||
if (cpu_is_pxa25x())
|
||||
if (cpu_is_pxa255())
|
||||
ret = platform_device_register(&pxa_device_hwuart);
|
||||
|
||||
clks_register(&gpio7_clk, 1);
|
||||
clks_register(pxa2xx_clk_aliases, ARRAY_SIZE(pxa2xx_clk_aliases));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -103,7 +103,7 @@ static void clk_gpio27_disable(void)
|
|||
}
|
||||
|
||||
static struct clk clk_gpio27 = {
|
||||
.name = "GPIO27_CLK",
|
||||
.name = "SA1111_CLK",
|
||||
.rate = 3686400,
|
||||
.enable = clk_gpio27_enable,
|
||||
.disable = clk_gpio27_disable,
|
||||
|
|
|
|||
|
|
@ -20,9 +20,11 @@
|
|||
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/pxa-regs.h>
|
||||
|
|
@ -30,20 +32,6 @@
|
|||
#define GPIO_NAND_CS (11)
|
||||
#define GPIO_NAND_RB (89)
|
||||
|
||||
/* This macro needed to ensure in-order operation of GPIO and local
|
||||
* bus. Without both asm command and dummy uncached read there're
|
||||
* states when NAND access is broken. I've looked for such macro(s) in
|
||||
* include/asm-arm but found nothing approptiate.
|
||||
* dmac_clean_range is close, but is makes cache invalidation
|
||||
* unnecessary here and it cannot be used in module
|
||||
*/
|
||||
#define DRAIN_WB() \
|
||||
do { \
|
||||
unsigned char dummy; \
|
||||
asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0"); \
|
||||
dummy=*((unsigned char*)UNCACHED_ADDR); \
|
||||
} while(0)
|
||||
|
||||
/* MTD structure for CM-X270 board */
|
||||
static struct mtd_info *cmx270_nand_mtd;
|
||||
|
||||
|
|
@ -103,14 +91,14 @@ static int cmx270_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
|
|||
|
||||
static inline void nand_cs_on(void)
|
||||
{
|
||||
GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
|
||||
gpio_set_value(GPIO_NAND_CS, 0);
|
||||
}
|
||||
|
||||
static void nand_cs_off(void)
|
||||
{
|
||||
DRAIN_WB();
|
||||
dsb();
|
||||
|
||||
GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
|
||||
gpio_set_value(GPIO_NAND_CS, 1);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -122,7 +110,7 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
|
|||
struct nand_chip* this = mtd->priv;
|
||||
unsigned int nandaddr = (unsigned int)this->IO_ADDR_W;
|
||||
|
||||
DRAIN_WB();
|
||||
dsb();
|
||||
|
||||
if (ctrl & NAND_CTRL_CHANGE) {
|
||||
if ( ctrl & NAND_ALE )
|
||||
|
|
@ -139,12 +127,12 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
|
|||
nand_cs_off();
|
||||
}
|
||||
|
||||
DRAIN_WB();
|
||||
dsb();
|
||||
this->IO_ADDR_W = (void __iomem*)nandaddr;
|
||||
if (dat != NAND_CMD_NONE)
|
||||
writel((dat << 16), this->IO_ADDR_W);
|
||||
|
||||
DRAIN_WB();
|
||||
dsb();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -152,9 +140,9 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
|
|||
*/
|
||||
static int cmx270_device_ready(struct mtd_info *mtd)
|
||||
{
|
||||
DRAIN_WB();
|
||||
dsb();
|
||||
|
||||
return (GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB));
|
||||
return (gpio_get_value(GPIO_NAND_RB));
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -168,20 +156,40 @@ static int cmx270_init(void)
|
|||
int mtd_parts_nb = 0;
|
||||
int ret;
|
||||
|
||||
if (!machine_is_armcore())
|
||||
return -ENODEV;
|
||||
|
||||
ret = gpio_request(GPIO_NAND_CS, "NAND CS");
|
||||
if (ret) {
|
||||
pr_warning("CM-X270: failed to request NAND CS gpio\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
gpio_direction_output(GPIO_NAND_CS, 1);
|
||||
|
||||
ret = gpio_request(GPIO_NAND_RB, "NAND R/B");
|
||||
if (ret) {
|
||||
pr_warning("CM-X270: failed to request NAND R/B gpio\n");
|
||||
goto err_gpio_request;
|
||||
}
|
||||
|
||||
gpio_direction_input(GPIO_NAND_RB);
|
||||
|
||||
/* Allocate memory for MTD device structure and private data */
|
||||
cmx270_nand_mtd = kzalloc(sizeof(struct mtd_info) +
|
||||
sizeof(struct nand_chip),
|
||||
GFP_KERNEL);
|
||||
if (!cmx270_nand_mtd) {
|
||||
printk("Unable to allocate CM-X270 NAND MTD device structure.\n");
|
||||
return -ENOMEM;
|
||||
pr_debug("Unable to allocate CM-X270 NAND MTD device structure.\n");
|
||||
ret = -ENOMEM;
|
||||
goto err_kzalloc;
|
||||
}
|
||||
|
||||
cmx270_nand_io = ioremap(PXA_CS1_PHYS, 12);
|
||||
if (!cmx270_nand_io) {
|
||||
printk("Unable to ioremap NAND device\n");
|
||||
pr_debug("Unable to ioremap NAND device\n");
|
||||
ret = -EINVAL;
|
||||
goto err1;
|
||||
goto err_ioremap;
|
||||
}
|
||||
|
||||
/* Get pointer to private data */
|
||||
|
|
@ -209,9 +217,9 @@ static int cmx270_init(void)
|
|||
|
||||
/* Scan to find existence of the device */
|
||||
if (nand_scan (cmx270_nand_mtd, 1)) {
|
||||
printk(KERN_NOTICE "No NAND device\n");
|
||||
pr_notice("No NAND device\n");
|
||||
ret = -ENXIO;
|
||||
goto err2;
|
||||
goto err_scan;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTD_CMDLINE_PARTS
|
||||
|
|
@ -229,18 +237,22 @@ static int cmx270_init(void)
|
|||
}
|
||||
|
||||
/* Register the partitions */
|
||||
printk(KERN_NOTICE "Using %s partition definition\n", part_type);
|
||||
pr_notice("Using %s partition definition\n", part_type);
|
||||
ret = add_mtd_partitions(cmx270_nand_mtd, mtd_parts, mtd_parts_nb);
|
||||
if (ret)
|
||||
goto err2;
|
||||
goto err_scan;
|
||||
|
||||
/* Return happy */
|
||||
return 0;
|
||||
|
||||
err2:
|
||||
err_scan:
|
||||
iounmap(cmx270_nand_io);
|
||||
err1:
|
||||
err_ioremap:
|
||||
kfree(cmx270_nand_mtd);
|
||||
err_kzalloc:
|
||||
gpio_free(GPIO_NAND_RB);
|
||||
err_gpio_request:
|
||||
gpio_free(GPIO_NAND_CS);
|
||||
|
||||
return ret;
|
||||
|
||||
|
|
@ -255,6 +267,9 @@ static void cmx270_cleanup(void)
|
|||
/* Release resources, unregister device */
|
||||
nand_release(cmx270_nand_mtd);
|
||||
|
||||
gpio_free(GPIO_NAND_RB);
|
||||
gpio_free(GPIO_NAND_CS);
|
||||
|
||||
iounmap(cmx270_nand_io);
|
||||
|
||||
/* Free the MTD device structure */
|
||||
|
|
|
|||
|
|
@ -5,83 +5,60 @@
|
|||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Compulab Ltd., 2003, 2007
|
||||
* Compulab Ltd., 2003, 2007, 2008
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <pcmcia/ss.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <asm/arch/pxa-regs.h>
|
||||
#include <asm/arch/pxa2xx-gpio.h>
|
||||
#include <asm/arch/cm-x270.h>
|
||||
|
||||
#include "soc_common.h"
|
||||
|
||||
#define GPIO_PCMCIA_S0_CD_VALID (84)
|
||||
#define GPIO_PCMCIA_S0_RDYINT (82)
|
||||
#define GPIO_PCMCIA_RESET (53)
|
||||
|
||||
#define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID)
|
||||
#define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT)
|
||||
|
||||
|
||||
static struct pcmcia_irqs irqs[] = {
|
||||
{ 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" },
|
||||
{ 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" },
|
||||
};
|
||||
|
||||
static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
|
||||
{
|
||||
GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
|
||||
GPIO_bit(GPIO49_nPWE) |
|
||||
GPIO_bit(GPIO50_nPIOR) |
|
||||
GPIO_bit(GPIO51_nPIOW) |
|
||||
GPIO_bit(GPIO85_nPCE_1) |
|
||||
GPIO_bit(GPIO54_nPCE_2);
|
||||
int ret = gpio_request(GPIO_PCMCIA_RESET, "PCCard reset");
|
||||
if (ret)
|
||||
return ret;
|
||||
gpio_direction_output(GPIO_PCMCIA_RESET, 0);
|
||||
|
||||
pxa_gpio_mode(GPIO48_nPOE_MD);
|
||||
pxa_gpio_mode(GPIO49_nPWE_MD);
|
||||
pxa_gpio_mode(GPIO50_nPIOR_MD);
|
||||
pxa_gpio_mode(GPIO51_nPIOW_MD);
|
||||
pxa_gpio_mode(GPIO85_nPCE_1_MD);
|
||||
pxa_gpio_mode(GPIO54_nPCE_2_MD);
|
||||
pxa_gpio_mode(GPIO55_nPREG_MD);
|
||||
pxa_gpio_mode(GPIO56_nPWAIT_MD);
|
||||
pxa_gpio_mode(GPIO57_nIOIS16_MD);
|
||||
skt->irq = PCMCIA_S0_RDYINT;
|
||||
ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
|
||||
if (!ret)
|
||||
gpio_free(GPIO_PCMCIA_RESET);
|
||||
|
||||
/* Reset signal */
|
||||
pxa_gpio_mode(GPIO53_nPCE_2 | GPIO_OUT);
|
||||
GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
|
||||
|
||||
set_irq_type(PCMCIA_S0_CD_VALID, IRQ_TYPE_EDGE_BOTH);
|
||||
set_irq_type(PCMCIA_S1_CD_VALID, IRQ_TYPE_EDGE_BOTH);
|
||||
|
||||
/* irq's for slots: */
|
||||
set_irq_type(PCMCIA_S0_RDYINT, IRQ_TYPE_EDGE_FALLING);
|
||||
set_irq_type(PCMCIA_S1_RDYINT, IRQ_TYPE_EDGE_FALLING);
|
||||
|
||||
skt->irq = (skt->nr == 0) ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT;
|
||||
return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void cmx270_pcmcia_shutdown(struct soc_pcmcia_socket *skt)
|
||||
{
|
||||
soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
|
||||
|
||||
set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_CD_VALID), IRQ_TYPE_NONE);
|
||||
set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_CD_VALID), IRQ_TYPE_NONE);
|
||||
|
||||
set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_RDYINT), IRQ_TYPE_NONE);
|
||||
set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_RDYINT), IRQ_TYPE_NONE);
|
||||
gpio_free(GPIO_PCMCIA_RESET);
|
||||
}
|
||||
|
||||
|
||||
static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
|
||||
struct pcmcia_state *state)
|
||||
{
|
||||
state->detect = (PCC_DETECT(skt->nr) == 0) ? 1 : 0;
|
||||
state->ready = (PCC_READY(skt->nr) == 0) ? 0 : 1;
|
||||
state->detect = (gpio_get_value(GPIO_PCMCIA_S0_CD_VALID) == 0) ? 1 : 0;
|
||||
state->ready = (gpio_get_value(GPIO_PCMCIA_S0_RDYINT) == 0) ? 0 : 1;
|
||||
state->bvd1 = 1;
|
||||
state->bvd2 = 1;
|
||||
state->vs_3v = 0;
|
||||
|
|
@ -93,32 +70,16 @@ static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
|
|||
static int cmx270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
|
||||
const socket_state_t *state)
|
||||
{
|
||||
GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
|
||||
pxa_gpio_mode(GPIO49_nPWE | GPIO_OUT);
|
||||
|
||||
switch (skt->nr) {
|
||||
case 0:
|
||||
if (state->flags & SS_RESET) {
|
||||
GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
|
||||
GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
|
||||
gpio_set_value(GPIO_PCMCIA_RESET, 1);
|
||||
udelay(10);
|
||||
GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
|
||||
GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
if (state->flags & SS_RESET) {
|
||||
GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
|
||||
GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
|
||||
udelay(10);
|
||||
GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
|
||||
GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
|
||||
gpio_set_value(GPIO_PCMCIA_RESET, 0);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
pxa_gpio_mode(GPIO49_nPWE_MD);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -139,7 +100,7 @@ static struct pcmcia_low_level cmx270_pcmcia_ops __initdata = {
|
|||
.configure_socket = cmx270_pcmcia_configure_socket,
|
||||
.socket_init = cmx270_pcmcia_socket_init,
|
||||
.socket_suspend = cmx270_pcmcia_socket_suspend,
|
||||
.nr = 2,
|
||||
.nr = 1,
|
||||
};
|
||||
|
||||
static struct platform_device *cmx270_pcmcia_device;
|
||||
|
|
|
|||
|
|
@ -1,50 +0,0 @@
|
|||
/*
|
||||
* linux/include/asm/arch-pxa/cm-x270.h
|
||||
*
|
||||
* Copyright Compulab Ltd., 2003, 2007
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
|
||||
/* CM-x270 device physical addresses */
|
||||
#define CMX270_CS1_PHYS (PXA_CS1_PHYS)
|
||||
#define MARATHON_PHYS (PXA_CS2_PHYS)
|
||||
#define CMX270_IDE104_PHYS (PXA_CS3_PHYS)
|
||||
#define CMX270_IT8152_PHYS (PXA_CS4_PHYS)
|
||||
|
||||
/* Statically mapped regions */
|
||||
#define CMX270_VIRT_BASE (0xe8000000)
|
||||
#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
|
||||
#define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M)
|
||||
|
||||
/* GPIO related definitions */
|
||||
#define GPIO_IT8152_IRQ (22)
|
||||
|
||||
#define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ)
|
||||
#define PME_IRQ IRQ_GPIO(0)
|
||||
#define CMX270_IDE_IRQ IRQ_GPIO(100)
|
||||
#define CMX270_GPIRQ1 IRQ_GPIO(101)
|
||||
#define CMX270_TOUCHIRQ IRQ_GPIO(96)
|
||||
#define CMX270_ETHIRQ IRQ_GPIO(10)
|
||||
#define CMX270_GFXIRQ IRQ_GPIO(95)
|
||||
#define CMX270_NANDIRQ IRQ_GPIO(89)
|
||||
#define CMX270_MMC_IRQ IRQ_GPIO(83)
|
||||
|
||||
/* PCMCIA related definitions */
|
||||
#define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x)))
|
||||
#define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x)))
|
||||
|
||||
#define PCMCIA_S0_CD_VALID IRQ_GPIO(84)
|
||||
#define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES
|
||||
|
||||
#define PCMCIA_S1_CD_VALID IRQ_GPIO(83)
|
||||
#define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES
|
||||
|
||||
#define PCMCIA_S0_RDYINT IRQ_GPIO(82)
|
||||
#define PCMCIA_S1_RDYINT IRQ_GPIO(81)
|
||||
|
||||
#define PCMCIA_RESET_GPIO 53
|
||||
|
|
@ -69,6 +69,12 @@
|
|||
_id == 0x212; \
|
||||
})
|
||||
|
||||
#define __cpu_is_pxa255(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 4 & 0xfff; \
|
||||
_id == 0x2d0; \
|
||||
})
|
||||
|
||||
#define __cpu_is_pxa25x(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 4 & 0xfff; \
|
||||
|
|
@ -76,6 +82,7 @@
|
|||
})
|
||||
#else
|
||||
#define __cpu_is_pxa21x(id) (0)
|
||||
#define __cpu_is_pxa255(id) (0)
|
||||
#define __cpu_is_pxa25x(id) (0)
|
||||
#endif
|
||||
|
||||
|
|
@ -124,6 +131,11 @@
|
|||
__cpu_is_pxa21x(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
#define cpu_is_pxa255() \
|
||||
({ \
|
||||
__cpu_is_pxa255(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
#define cpu_is_pxa25x() \
|
||||
({ \
|
||||
__cpu_is_pxa25x(read_cpuid_id()); \
|
||||
|
|
|
|||
Loading…
Reference in a new issue