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ARM: 6870/1: The mandatory barrier rmb() must be a dsb() in for device accesses

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Since mandatory barriers may be used (explicitly or implicitly via readl
etc.) to ensure the ordering between Device and Normal memory accesses,
a DMB is not enough. This patch converts it to a DSB.

Cc: Colin Cross <ccross@android.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Catalin Marinas 2011-04-06 16:18:47 +01:00 committed by Russell King
parent 2af68df02f
commit a904f5f9eb
3 changed files with 3 additions and 3 deletions
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2
arch/arm/include/asm/system.h
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@ -159,7 +159,7 @@ extern unsigned int user_debug;
#include <mach/barriers.h> #include <mach/barriers.h>
#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
#define mb() do { dsb(); outer_sync(); } while (0) #define mb() do { dsb(); outer_sync(); } while (0)
#define rmb() dmb() #define rmb() dsb()
#define wmb() mb() #define wmb() mb()
#else #else
#include <asm/memory.h> #include <asm/memory.h>

2
arch/arm/mach-realview/include/mach/barriers.h
View file

@ -4,5 +4,5 @@
* operation to deadlock the system. * operation to deadlock the system.
*/ */
#define mb() dsb() #define mb() dsb()
#define rmb() dmb() #define rmb() dsb()
#define wmb() mb() #define wmb() mb()

2
arch/arm/mach-tegra/include/mach/barriers.h
View file

@ -23,7 +23,7 @@
#include <asm/outercache.h> #include <asm/outercache.h>
#define rmb() dmb() #define rmb() dsb()
#define wmb() do { dsb(); outer_sync(); } while (0) #define wmb() do { dsb(); outer_sync(); } while (0)
#define mb() wmb() #define mb() wmb()