ASoC: add mt6351 codec driver
This patch adds the MediaTek MT6351 codec driver. MT6351 communicate with SoC through MediaTek PMIC wrapper. MT6351 use MediaTek proprietary audio interface. Signed-off-by: KaiChieh Chuang <kaichieh.chuang@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Kai Chieh Chuang
Mark Brown
parent
1e57b82891
commit
a74d51ba0e
5 changed files with 1633 additions and 0 deletions
16
Documentation/devicetree/bindings/sound/mt6351.txt
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16
Documentation/devicetree/bindings/sound/mt6351.txt
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@ -0,0 +1,16 @@
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Mediatek MT6351 Audio Codec
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The communication between MT6351 and SoC is through Mediatek PMIC wrapper.
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For more detail, please visit Mediatek PMIC wrapper documentation.
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Must be a child node of PMIC wrapper.
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Required properties:
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- compatible : "mediatek,mt6351-sound".
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Example:
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mt6351_snd {
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compatible = "mediatek,mt6351-sound";
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};
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@ -106,6 +106,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_MAX9877 if I2C
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select SND_SOC_MC13783 if MFD_MC13XXX
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select SND_SOC_ML26124 if I2C
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select SND_SOC_MT6351 if MTK_PMIC_WRAP
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select SND_SOC_NAU8540 if I2C
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select SND_SOC_NAU8810 if I2C
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select SND_SOC_NAU8824 if I2C
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@ -1259,6 +1260,9 @@ config SND_SOC_MC13783
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config SND_SOC_ML26124
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tristate
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config SND_SOC_MT6351
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tristate "MediaTek MT6351 Codec"
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config SND_SOC_NAU8540
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tristate "Nuvoton Technology Corporation NAU85L40 CODEC"
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depends on I2C
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@ -102,6 +102,7 @@ snd-soc-mc13783-objs := mc13783.o
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snd-soc-ml26124-objs := ml26124.o
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snd-soc-msm8916-analog-objs := msm8916-wcd-analog.o
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snd-soc-msm8916-digital-objs := msm8916-wcd-digital.o
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snd-soc-mt6351-objs := mt6351.o
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snd-soc-nau8540-objs := nau8540.o
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snd-soc-nau8810-objs := nau8810.o
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snd-soc-nau8824-objs := nau8824.o
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@ -357,6 +358,7 @@ obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o
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obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o
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obj-$(CONFIG_SND_SOC_MSM8916_WCD_ANALOG) +=snd-soc-msm8916-analog.o
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obj-$(CONFIG_SND_SOC_MSM8916_WCD_DIGITAL) +=snd-soc-msm8916-digital.o
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obj-$(CONFIG_SND_SOC_MT6351) += snd-soc-mt6351.o
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obj-$(CONFIG_SND_SOC_NAU8540) += snd-soc-nau8540.o
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obj-$(CONFIG_SND_SOC_NAU8810) += snd-soc-nau8810.o
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obj-$(CONFIG_SND_SOC_NAU8824) += snd-soc-nau8824.o
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1506
sound/soc/codecs/mt6351.c
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1506
sound/soc/codecs/mt6351.c
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File diff suppressed because it is too large
Load diff
105
sound/soc/codecs/mt6351.h
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sound/soc/codecs/mt6351.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* mt6351.h -- mt6351 ALSA SoC audio codec driver
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*
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* Copyright (c) 2018 MediaTek Inc.
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* Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
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*/
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#ifndef __MT6351_H__
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#define __MT6351_H__
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#define MT6351_AFE_UL_DL_CON0 (0x2000 + 0x0000)
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#define MT6351_AFE_DL_SRC2_CON0_H (0x2000 + 0x0002)
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#define MT6351_AFE_DL_SRC2_CON0_L (0x2000 + 0x0004)
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#define MT6351_AFE_DL_SDM_CON0 (0x2000 + 0x0006)
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#define MT6351_AFE_DL_SDM_CON1 (0x2000 + 0x0008)
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#define MT6351_AFE_UL_SRC_CON0_H (0x2000 + 0x000a)
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#define MT6351_AFE_UL_SRC_CON0_L (0x2000 + 0x000c)
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#define MT6351_AFE_UL_SRC_CON1_H (0x2000 + 0x000e)
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#define MT6351_AFE_UL_SRC_CON1_L (0x2000 + 0x0010)
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#define MT6351_AFE_TOP_CON0 (0x2000 + 0x0012)
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#define MT6351_AUDIO_TOP_CON0 (0x2000 + 0x0014)
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#define MT6351_AFE_DL_SRC_MON0 (0x2000 + 0x0016)
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#define MT6351_AFE_DL_SDM_TEST0 (0x2000 + 0x0018)
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#define MT6351_AFE_MON_DEBUG0 (0x2000 + 0x001a)
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#define MT6351_AFUNC_AUD_CON0 (0x2000 + 0x001c)
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#define MT6351_AFUNC_AUD_CON1 (0x2000 + 0x001e)
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#define MT6351_AFUNC_AUD_CON2 (0x2000 + 0x0020)
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#define MT6351_AFUNC_AUD_CON3 (0x2000 + 0x0022)
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#define MT6351_AFUNC_AUD_CON4 (0x2000 + 0x0024)
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#define MT6351_AFUNC_AUD_MON0 (0x2000 + 0x0026)
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#define MT6351_AFUNC_AUD_MON1 (0x2000 + 0x0028)
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#define MT6351_AFE_UP8X_FIFO_CFG0 (0x2000 + 0x002c)
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#define MT6351_AFE_UP8X_FIFO_LOG_MON0 (0x2000 + 0x002e)
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#define MT6351_AFE_UP8X_FIFO_LOG_MON1 (0x2000 + 0x0030)
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#define MT6351_AFE_DL_DC_COMP_CFG0 (0x2000 + 0x0032)
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#define MT6351_AFE_DL_DC_COMP_CFG1 (0x2000 + 0x0034)
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#define MT6351_AFE_DL_DC_COMP_CFG2 (0x2000 + 0x0036)
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#define MT6351_AFE_PMIC_NEWIF_CFG0 (0x2000 + 0x0038)
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#define MT6351_AFE_PMIC_NEWIF_CFG1 (0x2000 + 0x003a)
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#define MT6351_AFE_PMIC_NEWIF_CFG2 (0x2000 + 0x003c)
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#define MT6351_AFE_PMIC_NEWIF_CFG3 (0x2000 + 0x003e)
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#define MT6351_AFE_SGEN_CFG0 (0x2000 + 0x0040)
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#define MT6351_AFE_SGEN_CFG1 (0x2000 + 0x0042)
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#define MT6351_AFE_ADDA2_UP8X_FIFO_LOG_MON0 (0x2000 + 0x004c)
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#define MT6351_AFE_ADDA2_UP8X_FIFO_LOG_MON1 (0x2000 + 0x004e)
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#define MT6351_AFE_ADDA2_PMIC_NEWIF_CFG0 (0x2000 + 0x0050)
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#define MT6351_AFE_ADDA2_PMIC_NEWIF_CFG1 (0x2000 + 0x0052)
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#define MT6351_AFE_ADDA2_PMIC_NEWIF_CFG2 (0x2000 + 0x0054)
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#define MT6351_AFE_DCCLK_CFG0 (0x2000 + 0x0090)
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#define MT6351_AFE_DCCLK_CFG1 (0x2000 + 0x0092)
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#define MT6351_AFE_HPANC_CFG0 (0x2000 + 0x0094)
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#define MT6351_AFE_NCP_CFG0 (0x2000 + 0x0096)
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#define MT6351_AFE_NCP_CFG1 (0x2000 + 0x0098)
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#define MT6351_TOP_CKPDN_CON0 0x023A
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#define MT6351_TOP_CKPDN_CON0_SET 0x023C
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#define MT6351_TOP_CKPDN_CON0_CLR 0x023E
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#define MT6351_TOP_CLKSQ 0x029A
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#define MT6351_TOP_CLKSQ_SET 0x029C
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#define MT6351_TOP_CLKSQ_CLR 0x029E
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#define MT6351_ZCD_CON0 0x0800
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#define MT6351_ZCD_CON1 0x0802
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#define MT6351_ZCD_CON2 0x0804
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#define MT6351_ZCD_CON3 0x0806
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#define MT6351_ZCD_CON4 0x0808
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#define MT6351_ZCD_CON5 0x080A
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#define MT6351_LDO_VA18_CON0 0x0A00
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#define MT6351_LDO_VA18_CON1 0x0A02
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#define MT6351_LDO_VUSB33_CON0 0x0A16
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#define MT6351_LDO_VUSB33_CON1 0x0A18
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#define MT6351_AUDDEC_ANA_CON0 0x0CF2
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#define MT6351_AUDDEC_ANA_CON1 0x0CF4
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#define MT6351_AUDDEC_ANA_CON2 0x0CF6
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#define MT6351_AUDDEC_ANA_CON3 0x0CF8
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#define MT6351_AUDDEC_ANA_CON4 0x0CFA
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#define MT6351_AUDDEC_ANA_CON5 0x0CFC
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#define MT6351_AUDDEC_ANA_CON6 0x0CFE
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#define MT6351_AUDDEC_ANA_CON7 0x0D00
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#define MT6351_AUDDEC_ANA_CON8 0x0D02
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#define MT6351_AUDDEC_ANA_CON9 0x0D04
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#define MT6351_AUDDEC_ANA_CON10 0x0D06
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#define MT6351_AUDENC_ANA_CON0 0x0D08
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#define MT6351_AUDENC_ANA_CON1 0x0D0A
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#define MT6351_AUDENC_ANA_CON2 0x0D0C
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#define MT6351_AUDENC_ANA_CON3 0x0D0E
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#define MT6351_AUDENC_ANA_CON4 0x0D10
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#define MT6351_AUDENC_ANA_CON5 0x0D12
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#define MT6351_AUDENC_ANA_CON6 0x0D14
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#define MT6351_AUDENC_ANA_CON7 0x0D16
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#define MT6351_AUDENC_ANA_CON8 0x0D18
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#define MT6351_AUDENC_ANA_CON9 0x0D1A
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#define MT6351_AUDENC_ANA_CON10 0x0D1C
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#define MT6351_AUDENC_ANA_CON11 0x0D1E
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#define MT6351_AUDENC_ANA_CON12 0x0D20
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#define MT6351_AUDENC_ANA_CON13 0x0D22
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#define MT6351_AUDENC_ANA_CON14 0x0D24
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#define MT6351_AUDENC_ANA_CON15 0x0D26
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#define MT6351_AUDENC_ANA_CON16 0x0D28
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#endif
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