ARM: 6835/1: perf: ensure overflows aren't missed due to IRQ latency
If a counter overflows during a perf stat profiling run it may overtake the last known value of the counter: 0 prev new 0xffffffff |----------|-------|----------------------| In this case, the number of events that have occurred is (0xffffffff - prev) + new. Unfortunately, the event update code will not realise an overflow has occurred and will instead report the event delta as (new - prev) which may be considerably smaller than the real count. This patch adds an extra argument to armpmu_event_update which indicates whether or not an overflow has occurred. If an overflow has occurred then we use the maximum period of the counter to calculate the elapsed events. Acked-by: Jamie Iles <jamie@jamieiles.com> Reported-by: Ashwin Chaugule <ashwinc@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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574b69cbb6
commit
a737823d37
4 changed files with 15 additions and 12 deletions
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@ -205,11 +205,9 @@ armpmu_event_set_period(struct perf_event *event,
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static u64
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armpmu_event_update(struct perf_event *event,
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struct hw_perf_event *hwc,
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int idx)
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int idx, int overflow)
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{
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int shift = 64 - 32;
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s64 prev_raw_count, new_raw_count;
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u64 delta;
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u64 delta, prev_raw_count, new_raw_count;
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again:
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prev_raw_count = local64_read(&hwc->prev_count);
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@ -219,8 +217,13 @@ armpmu_event_update(struct perf_event *event,
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new_raw_count) != prev_raw_count)
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goto again;
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delta = (new_raw_count << shift) - (prev_raw_count << shift);
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delta >>= shift;
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new_raw_count &= armpmu->max_period;
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prev_raw_count &= armpmu->max_period;
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if (overflow)
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delta = armpmu->max_period - prev_raw_count + new_raw_count;
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else
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delta = new_raw_count - prev_raw_count;
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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@ -237,7 +240,7 @@ armpmu_read(struct perf_event *event)
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if (hwc->idx < 0)
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return;
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armpmu_event_update(event, hwc, hwc->idx);
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armpmu_event_update(event, hwc, hwc->idx, 0);
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}
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static void
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@ -255,7 +258,7 @@ armpmu_stop(struct perf_event *event, int flags)
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if (!(hwc->state & PERF_HES_STOPPED)) {
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armpmu->disable(hwc, hwc->idx);
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barrier(); /* why? */
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armpmu_event_update(event, hwc, hwc->idx);
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armpmu_event_update(event, hwc, hwc->idx, 0);
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hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
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}
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}
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@ -474,7 +474,7 @@ armv6pmu_handle_irq(int irq_num,
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continue;
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hwc = &event->hw;
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armpmu_event_update(event, hwc, idx);
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armpmu_event_update(event, hwc, idx, 1);
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data.period = event->hw.last_period;
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if (!armpmu_event_set_period(event, hwc, idx))
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continue;
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@ -782,7 +782,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
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continue;
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hwc = &event->hw;
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armpmu_event_update(event, hwc, idx);
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armpmu_event_update(event, hwc, idx, 1);
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data.period = event->hw.last_period;
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if (!armpmu_event_set_period(event, hwc, idx))
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continue;
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@ -246,7 +246,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
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continue;
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hwc = &event->hw;
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armpmu_event_update(event, hwc, idx);
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armpmu_event_update(event, hwc, idx, 1);
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data.period = event->hw.last_period;
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if (!armpmu_event_set_period(event, hwc, idx))
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continue;
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@ -578,7 +578,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
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continue;
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hwc = &event->hw;
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armpmu_event_update(event, hwc, idx);
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armpmu_event_update(event, hwc, idx, 1);
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data.period = event->hw.last_period;
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if (!armpmu_event_set_period(event, hwc, idx))
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continue;
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