GPIO: MIPS: lantiq: convert gpio-mm-lantiq to OF and of_mm_gpio
Implements OF support and convert to of_mm_gpio. By attaching hardware latches to the External Bus Unit (EBU) on Lantiq SoC, it is possible to create output only gpios. This driver configures a special memory address, which when written to, outputs 16 bit to the latches. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2 changed files with 128 additions and 58 deletions
38
Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt
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38
Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt
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@ -0,0 +1,38 @@
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Lantiq SoC External Bus memory mapped GPIO controller
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By attaching hardware latches to the EBU it is possible to create output
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only gpios. This driver configures a special memory address, which when
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written to outputs 16 bit to the latches.
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The node describing the memory mapped GPIOs needs to be a child of the node
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describing the "lantiq,localbus".
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Required properties:
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- compatible : Should be "lantiq,gpio-mm-lantiq"
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- reg : Address and length of the register set for the device
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify optional parameters (currently
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unused).
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- gpio-controller : Marks the device node as a gpio controller.
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Optional properties:
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- lantiq,shadow : The default value that we shall assume as already set on the
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shift register cascade.
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Example:
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localbus@0 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
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1 0 0x4000000 0x4000010>; /* addsel1 */
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compatible = "lantiq,localbus", "simple-bus";
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gpio_mm0: gpio@4000000 {
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compatible = "lantiq,gpio-mm";
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reg = <1 0x0 0x10>;
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gpio-controller;
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#gpio-cells = <2>;
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lantiq,shadow = <0x77f>
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};
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}
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@ -3,16 +3,19 @@
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* under the terms of the GNU General Public License version 2 as published
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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* by the Free Software Foundation.
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*
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*
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* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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* Copyright (C) 2012 John Crispin <blogic@openwrt.org>
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*/
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*/
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/mutex.h>
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#include <linux/mutex.h>
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#include <linux/gpio.h>
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#include <linux/gpio.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <lantiq_soc.h>
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#include <lantiq_soc.h>
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@ -25,102 +28,131 @@
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#define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */
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#define LTQ_EBU_BUSCON 0x1e7ff /* 16 bit access, slowest timing */
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#define LTQ_EBU_WP 0x80000000 /* write protect bit */
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#define LTQ_EBU_WP 0x80000000 /* write protect bit */
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/* we keep a shadow value of the last value written to the ebu */
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struct ltq_mm {
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static int ltq_ebu_gpio_shadow = 0x0;
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struct of_mm_gpio_chip mmchip;
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static void __iomem *ltq_ebu_gpio_membase;
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u16 shadow; /* shadow the latches state */
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};
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static void ltq_ebu_apply(void)
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/**
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* ltq_mm_apply() - write the shadow value to the ebu address.
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* @chip: Pointer to our private data structure.
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*
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* Write the shadow value to the EBU to set the gpios. We need to set the
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* global EBU lock to make sure that PCI/MTD dont break.
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*/
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static void ltq_mm_apply(struct ltq_mm *chip)
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{
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{
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&ebu_lock, flags);
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spin_lock_irqsave(&ebu_lock, flags);
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ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1);
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ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1);
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*((__u16 *)ltq_ebu_gpio_membase) = ltq_ebu_gpio_shadow;
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__raw_writew(chip->shadow, chip->mmchip.regs);
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ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);
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ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);
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spin_unlock_irqrestore(&ebu_lock, flags);
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spin_unlock_irqrestore(&ebu_lock, flags);
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}
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}
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static void ltq_ebu_set(struct gpio_chip *chip, unsigned offset, int value)
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/**
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* ltq_mm_set() - gpio_chip->set - set gpios.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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* @val: Value to be written to specified signal.
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*
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* Set the shadow value and call ltq_mm_apply.
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*/
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static void ltq_mm_set(struct gpio_chip *gc, unsigned offset, int value)
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{
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct ltq_mm *chip =
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container_of(mm_gc, struct ltq_mm, mmchip);
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if (value)
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if (value)
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ltq_ebu_gpio_shadow |= (1 << offset);
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chip->shadow |= (1 << offset);
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else
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else
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ltq_ebu_gpio_shadow &= ~(1 << offset);
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chip->shadow &= ~(1 << offset);
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ltq_ebu_apply();
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ltq_mm_apply(chip);
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}
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}
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static int ltq_ebu_direction_output(struct gpio_chip *chip, unsigned offset,
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/**
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int value)
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* ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction.
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* @gc: Pointer to gpio_chip device structure.
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* @gpio: GPIO signal number.
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* @val: Value to be written to specified signal.
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*
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* Same as ltq_mm_set, always returns 0.
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*/
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static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value)
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{
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{
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ltq_ebu_set(chip, offset, value);
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ltq_mm_set(gc, offset, value);
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return 0;
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return 0;
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}
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}
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static struct gpio_chip ltq_ebu_chip = {
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/**
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.label = "ltq_ebu",
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* ltq_mm_save_regs() - Set initial values of GPIO pins
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.direction_output = ltq_ebu_direction_output,
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* @mm_gc: pointer to memory mapped GPIO chip structure
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.set = ltq_ebu_set,
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*/
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.base = 72,
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static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc)
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.ngpio = 16,
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{
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.can_sleep = 1,
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struct ltq_mm *chip =
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.owner = THIS_MODULE,
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container_of(mm_gc, struct ltq_mm, mmchip);
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};
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/* tell the ebu controller which memory address we will be using */
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static int ltq_ebu_probe(struct platform_device *pdev)
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ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1);
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ltq_mm_apply(chip);
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}
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static int ltq_mm_probe(struct platform_device *pdev)
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{
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{
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int ret = 0;
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct ltq_mm *chip;
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const __be32 *shadow;
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int ret = 0;
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if (!res) {
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if (!res) {
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dev_err(&pdev->dev, "failed to get memory resource\n");
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dev_err(&pdev->dev, "failed to get memory resource\n");
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return -ENOENT;
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return -ENOENT;
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}
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}
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res = devm_request_mem_region(&pdev->dev, res->start,
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chip = kzalloc(sizeof(*chip), GFP_KERNEL);
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resource_size(res), dev_name(&pdev->dev));
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if (!chip)
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if (!res) {
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dev_err(&pdev->dev, "failed to request memory resource\n");
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return -EBUSY;
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}
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ltq_ebu_gpio_membase = devm_ioremap_nocache(&pdev->dev, res->start,
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resource_size(res));
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if (!ltq_ebu_gpio_membase) {
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dev_err(&pdev->dev, "Failed to ioremap mem region\n");
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return -ENOMEM;
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return -ENOMEM;
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}
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/* grab the default shadow value passed form the platform code */
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chip->mmchip.gc.ngpio = 16;
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ltq_ebu_gpio_shadow = (unsigned int) pdev->dev.platform_data;
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chip->mmchip.gc.label = "gpio-mm-ltq";
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chip->mmchip.gc.direction_output = ltq_mm_dir_out;
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chip->mmchip.gc.set = ltq_mm_set;
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chip->mmchip.save_regs = ltq_mm_save_regs;
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/* tell the ebu controller which memory address we will be using */
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/* store the shadow value if one was passed by the devicetree */
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ltq_ebu_w32(pdev->resource->start | 0x1, LTQ_EBU_ADDRSEL1);
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shadow = of_get_property(pdev->dev.of_node, "lantiq,shadow", NULL);
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if (shadow)
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chip->shadow = be32_to_cpu(*shadow);
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/* write protect the region */
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ret = of_mm_gpiochip_add(pdev->dev.of_node, &chip->mmchip);
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ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1);
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if (ret)
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kfree(chip);
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ret = gpiochip_add(<q_ebu_chip);
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if (!ret)
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ltq_ebu_apply();
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return ret;
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return ret;
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}
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}
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static struct platform_driver ltq_ebu_driver = {
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static const struct of_device_id ltq_mm_match[] = {
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.probe = ltq_ebu_probe,
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{ .compatible = "lantiq,gpio-mm" },
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{},
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};
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MODULE_DEVICE_TABLE(of, ltq_mm_match);
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static struct platform_driver ltq_mm_driver = {
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.probe = ltq_mm_probe,
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.driver = {
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.driver = {
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.name = "ltq_ebu",
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.name = "gpio-mm-ltq",
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.owner = THIS_MODULE,
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.owner = THIS_MODULE,
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.of_match_table = ltq_mm_match,
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},
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},
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};
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};
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static int __init ltq_ebu_init(void)
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static int __init ltq_mm_init(void)
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{
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{
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int ret = platform_driver_register(<q_ebu_driver);
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return platform_driver_register(<q_mm_driver);
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if (ret)
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pr_info("ltq_ebu : Error registering platfom driver!");
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return ret;
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}
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}
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postcore_initcall(ltq_ebu_init);
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subsys_initcall(ltq_mm_init);
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