[ALSA] Fix NM256 hard lock up
Modules: NM256 driver Treat the nm256 mixer as a write-only device so as to avoid hangs on initialisation. Signed-off-by: Florian Schlichting <Florian.Schlichting@gmx.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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7c5706bb33
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a23446c085
1 changed files with 96 additions and 24 deletions
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@ -228,6 +228,7 @@ struct nm256 {
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unsigned int use_cache: 1; /* use one big coef. table */
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unsigned int use_cache: 1; /* use one big coef. table */
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unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
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unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
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unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
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unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
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unsigned int in_resume: 1;
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int mixer_base; /* register offset of ac97 mixer */
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int mixer_base; /* register offset of ac97 mixer */
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int mixer_status_offset; /* offset of mixer status reg. */
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int mixer_status_offset; /* offset of mixer status reg. */
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@ -242,6 +243,7 @@ struct nm256 {
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struct nm256_stream streams[2];
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struct nm256_stream streams[2];
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struct snd_ac97 *ac97;
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struct snd_ac97 *ac97;
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unsigned short *ac97_regs; /* register caches, only for valid regs */
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struct snd_pcm *pcm;
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struct snd_pcm *pcm;
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@ -1154,22 +1156,62 @@ snd_nm256_ac97_ready(struct nm256 *chip)
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}
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}
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/*
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/*
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* Initial register values to be written to the AC97 mixer.
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* While most of these are identical to the reset values, we do this
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* so that we have most of the register contents cached--this avoids
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* reading from the mixer directly (which seems to be problematic,
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* probably due to ignorance).
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*/
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struct initialValues {
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unsigned short reg;
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unsigned short value;
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};
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static struct initialValues nm256_ac97_init_val[] =
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{
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{ AC97_MASTER, 0x8000 },
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{ AC97_HEADPHONE, 0x8000 },
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{ AC97_MASTER_MONO, 0x8000 },
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{ AC97_PC_BEEP, 0x8000 },
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{ AC97_PHONE, 0x8008 },
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{ AC97_MIC, 0x8000 },
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{ AC97_LINE, 0x8808 },
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{ AC97_CD, 0x8808 },
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{ AC97_VIDEO, 0x8808 },
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{ AC97_AUX, 0x8808 },
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{ AC97_PCM, 0x8808 },
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{ AC97_REC_SEL, 0x0000 },
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{ AC97_REC_GAIN, 0x0B0B },
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{ AC97_GENERAL_PURPOSE, 0x0000 },
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{ AC97_3D_CONTROL, 0x8000 },
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{ AC97_VENDOR_ID1, 0x8384 },
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{ AC97_VENDOR_ID2, 0x7609 },
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};
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static int nm256_ac97_idx(unsigned short reg)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
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if (nm256_ac97_init_val[i].reg == reg)
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return i;
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return -1;
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}
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/*
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* some nm256 easily crash when reading from mixer registers
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* thus we're treating it as a write-only mixer and cache the
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* written values
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*/
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*/
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static unsigned short
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static unsigned short
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snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
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snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
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{
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{
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struct nm256 *chip = ac97->private_data;
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struct nm256 *chip = ac97->private_data;
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int res;
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int idx = nm256_ac97_idx(reg);
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if (reg >= 128)
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if (idx < 0)
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return 0;
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return 0;
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return chip->ac97_regs[idx];
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if (! snd_nm256_ac97_ready(chip))
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return 0;
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res = snd_nm256_readw(chip, chip->mixer_base + reg);
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/* Magic delay. Bleah yucky. */
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msleep(1);
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return res;
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}
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}
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/*
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/*
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@ -1180,8 +1222,12 @@ snd_nm256_ac97_write(struct snd_ac97 *ac97,
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{
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{
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struct nm256 *chip = ac97->private_data;
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struct nm256 *chip = ac97->private_data;
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int tries = 2;
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int tries = 2;
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int idx = nm256_ac97_idx(reg);
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u32 base;
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u32 base;
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if (idx < 0)
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return;
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base = chip->mixer_base;
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base = chip->mixer_base;
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snd_nm256_ac97_ready(chip);
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snd_nm256_ac97_ready(chip);
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@ -1190,12 +1236,32 @@ snd_nm256_ac97_write(struct snd_ac97 *ac97,
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while (tries-- > 0) {
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while (tries-- > 0) {
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snd_nm256_writew(chip, base + reg, val);
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snd_nm256_writew(chip, base + reg, val);
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msleep(1); /* a little delay here seems better.. */
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msleep(1); /* a little delay here seems better.. */
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if (snd_nm256_ac97_ready(chip))
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if (snd_nm256_ac97_ready(chip)) {
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/* successful write: set cache */
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chip->ac97_regs[idx] = val;
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return;
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return;
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}
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}
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}
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snd_printd("nm256: ac97 codec not ready..\n");
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snd_printd("nm256: ac97 codec not ready..\n");
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}
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}
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/* static resolution table */
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static struct snd_ac97_res_table nm256_res_table[] = {
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{ AC97_MASTER, 0x1f1f },
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{ AC97_HEADPHONE, 0x1f1f },
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{ AC97_MASTER_MONO, 0x001f },
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{ AC97_PC_BEEP, 0x001f },
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{ AC97_PHONE, 0x001f },
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{ AC97_MIC, 0x001f },
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{ AC97_LINE, 0x1f1f },
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{ AC97_CD, 0x1f1f },
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{ AC97_VIDEO, 0x1f1f },
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{ AC97_AUX, 0x1f1f },
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{ AC97_PCM, 0x1f1f },
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{ AC97_REC_GAIN, 0x0f0f },
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{ } /* terminator */
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};
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/* initialize the ac97 into a known state */
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/* initialize the ac97 into a known state */
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static void
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static void
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snd_nm256_ac97_reset(struct snd_ac97 *ac97)
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snd_nm256_ac97_reset(struct snd_ac97 *ac97)
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@ -1213,6 +1279,16 @@ snd_nm256_ac97_reset(struct snd_ac97 *ac97)
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snd_nm256_writeb(chip, 0x6cc, 0x80);
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snd_nm256_writeb(chip, 0x6cc, 0x80);
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snd_nm256_writeb(chip, 0x6cc, 0x0);
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snd_nm256_writeb(chip, 0x6cc, 0x0);
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}
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}
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if (! chip->in_resume) {
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int i;
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for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
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/* preload the cache, so as to avoid even a single
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* read of the mixer regs
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*/
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snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
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nm256_ac97_init_val[i].value);
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}
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}
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}
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}
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/* create an ac97 mixer interface */
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/* create an ac97 mixer interface */
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@ -1221,32 +1297,25 @@ snd_nm256_mixer(struct nm256 *chip)
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{
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{
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struct snd_ac97_bus *pbus;
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struct snd_ac97_bus *pbus;
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struct snd_ac97_template ac97;
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struct snd_ac97_template ac97;
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int i, err;
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int err;
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static struct snd_ac97_bus_ops ops = {
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static struct snd_ac97_bus_ops ops = {
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.reset = snd_nm256_ac97_reset,
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.reset = snd_nm256_ac97_reset,
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.write = snd_nm256_ac97_write,
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.write = snd_nm256_ac97_write,
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.read = snd_nm256_ac97_read,
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.read = snd_nm256_ac97_read,
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};
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};
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/* looks like nm256 hangs up when unexpected registers are touched... */
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static int mixer_regs[] = {
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chip->ac97_regs = kcalloc(sizeof(short),
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AC97_MASTER, AC97_HEADPHONE, AC97_MASTER_MONO,
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ARRAY_SIZE(nm256_ac97_init_val), GFP_KERNEL);
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AC97_PC_BEEP, AC97_PHONE, AC97_MIC, AC97_LINE, AC97_CD,
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if (! chip->ac97_regs)
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AC97_VIDEO, AC97_AUX, AC97_PCM, AC97_REC_SEL,
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return -ENOMEM;
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AC97_REC_GAIN, AC97_GENERAL_PURPOSE, AC97_3D_CONTROL,
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/*AC97_EXTENDED_ID,*/
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AC97_VENDOR_ID1, AC97_VENDOR_ID2,
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-1
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};
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if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
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if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
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return err;
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return err;
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memset(&ac97, 0, sizeof(ac97));
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memset(&ac97, 0, sizeof(ac97));
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ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
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ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
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ac97.limited_regs = 1;
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for (i = 0; mixer_regs[i] >= 0; i++)
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set_bit(mixer_regs[i], ac97.reg_accessed);
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ac97.private_data = chip;
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ac97.private_data = chip;
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ac97.res_table = nm256_res_table;
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pbus->no_vra = 1;
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pbus->no_vra = 1;
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err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
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err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
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if (err < 0)
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if (err < 0)
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@ -1331,6 +1400,7 @@ static int nm256_resume(struct pci_dev *pci)
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int i;
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int i;
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/* Perform a full reset on the hardware */
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/* Perform a full reset on the hardware */
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chip->in_resume = 1;
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pci_restore_state(pci);
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pci_restore_state(pci);
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pci_enable_device(pci);
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pci_enable_device(pci);
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snd_nm256_init_chip(chip);
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snd_nm256_init_chip(chip);
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@ -1348,6 +1418,7 @@ static int nm256_resume(struct pci_dev *pci)
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}
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}
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snd_power_change_state(card, SNDRV_CTL_POWER_D0);
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snd_power_change_state(card, SNDRV_CTL_POWER_D0);
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chip->in_resume = 0;
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return 0;
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return 0;
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}
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}
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#endif /* CONFIG_PM */
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#endif /* CONFIG_PM */
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@ -1372,6 +1443,7 @@ static int snd_nm256_free(struct nm256 *chip)
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free_irq(chip->irq, chip);
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free_irq(chip->irq, chip);
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pci_disable_device(chip->pci);
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pci_disable_device(chip->pci);
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kfree(chip->ac97_regs);
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kfree(chip);
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kfree(chip);
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return 0;
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return 0;
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}
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}
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