arm64: big-endian: don't treat code as data when copying sigret code
Currently the sigreturn compat code is copied to an offset in the vectors table. When using a BE kernel this data will be stored in the wrong endianess so when returning from a signal on a 32-bit BE system, arbitrary code will be executed. Instead of declaring the code inside a struct and copying that, use the assembler's .byte directives to store the code in the correct endianess regardless of platform endianess. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Matthew Leach <matthew.leach@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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3 changed files with 46 additions and 29 deletions
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@ -27,6 +27,9 @@
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*
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* See Documentation/arm/kernel_user_helpers.txt for formal definitions.
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*/
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#include <asm/unistd32.h>
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.align 5
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.globl __kuser_helper_start
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__kuser_helper_start:
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@ -75,3 +78,42 @@ __kuser_helper_version: // 0xffff0ffc
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.word ((__kuser_helper_end - __kuser_helper_start) >> 5)
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.globl __kuser_helper_end
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__kuser_helper_end:
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/*
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* AArch32 sigreturn code
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*
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* For ARM syscalls, the syscall number has to be loaded into r7.
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* We do not support an OABI userspace.
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*
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* For Thumb syscalls, we also pass the syscall number via r7. We therefore
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* need two 16-bit instructions.
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*/
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.globl __aarch32_sigret_code_start
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__aarch32_sigret_code_start:
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/*
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* ARM Code
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*/
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.byte __NR_compat_sigreturn, 0x70, 0xa0, 0xe3 // mov r7, #__NR_compat_sigreturn
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.byte __NR_compat_sigreturn, 0x00, 0x00, 0xef // svc #__NR_compat_sigreturn
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/*
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* Thumb code
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*/
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.byte __NR_compat_sigreturn, 0x27 // svc #__NR_compat_sigreturn
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.byte __NR_compat_sigreturn, 0xdf // mov r7, #__NR_compat_sigreturn
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/*
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* ARM code
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*/
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.byte __NR_compat_rt_sigreturn, 0x70, 0xa0, 0xe3 // mov r7, #__NR_compat_rt_sigreturn
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.byte __NR_compat_rt_sigreturn, 0x00, 0x00, 0xef // svc #__NR_compat_rt_sigreturn
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/*
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* Thumb code
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*/
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.byte __NR_compat_rt_sigreturn, 0x27 // svc #__NR_compat_rt_sigreturn
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.byte __NR_compat_rt_sigreturn, 0xdf // mov r7, #__NR_compat_rt_sigreturn
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.globl __aarch32_sigret_code_end
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__aarch32_sigret_code_end:
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@ -100,34 +100,6 @@ struct compat_rt_sigframe {
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#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
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/*
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* For ARM syscalls, the syscall number has to be loaded into r7.
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* We do not support an OABI userspace.
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*/
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#define MOV_R7_NR_SIGRETURN (0xe3a07000 | __NR_compat_sigreturn)
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#define SVC_SYS_SIGRETURN (0xef000000 | __NR_compat_sigreturn)
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#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | __NR_compat_rt_sigreturn)
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#define SVC_SYS_RT_SIGRETURN (0xef000000 | __NR_compat_rt_sigreturn)
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/*
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* For Thumb syscalls, we also pass the syscall number via r7. We therefore
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* need two 16-bit instructions.
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*/
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#define SVC_THUMB_SIGRETURN (((0xdf00 | __NR_compat_sigreturn) << 16) | \
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0x2700 | __NR_compat_sigreturn)
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#define SVC_THUMB_RT_SIGRETURN (((0xdf00 | __NR_compat_rt_sigreturn) << 16) | \
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0x2700 | __NR_compat_rt_sigreturn)
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const compat_ulong_t aarch32_sigret_code[6] = {
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/*
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* AArch32 sigreturn code.
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* We don't construct an OABI SWI - instead we just set the imm24 field
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* to the EABI syscall number so that we create a sane disassembly.
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*/
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MOV_R7_NR_SIGRETURN, SVC_SYS_SIGRETURN, SVC_THUMB_SIGRETURN,
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MOV_R7_NR_RT_SIGRETURN, SVC_SYS_RT_SIGRETURN, SVC_THUMB_RT_SIGRETURN,
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};
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static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
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{
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compat_sigset_t cset;
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@ -58,7 +58,10 @@ static struct page *vectors_page[1];
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static int alloc_vectors_page(void)
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{
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extern char __kuser_helper_start[], __kuser_helper_end[];
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extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[];
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int kuser_sz = __kuser_helper_end - __kuser_helper_start;
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int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start;
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unsigned long vpage;
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vpage = get_zeroed_page(GFP_ATOMIC);
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@ -72,7 +75,7 @@ static int alloc_vectors_page(void)
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/* sigreturn code */
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memcpy((void *)vpage + AARCH32_KERN_SIGRET_CODE_OFFSET,
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aarch32_sigret_code, sizeof(aarch32_sigret_code));
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__aarch32_sigret_code_start, sigret_sz);
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flush_icache_range(vpage, vpage + PAGE_SIZE);
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vectors_page[0] = virt_to_page(vpage);
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