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DaVinci: EDMA: Updating default queue handling

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EDMA queues in DM365 are a little different than those
on other DaVinci's. On DM365 Q0 and Q1 have the larger
FIFO size. We want Q0 and Q1 to be used by codecs and
DVSDK demos.
MMC driver is the only driver which uses the flag
'EVENTQ_DEFAULT'. So MMC driver should be using Q2 instead of
Q1 on DM365.
This patch allows us to declare a "default queue" from
SOC specific code. If it is not declared then the EDMA
driver assumes a default of queue 1.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Sandeep Paulraj 2009-07-27 09:57:07 -04:00 committed by Kevin Hilman
parent 10eef5a8a0
commit a0f0202e2a
3 changed files with 8 additions and 1 deletions
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1
arch/arm/mach-davinci/dm365.c
View file

@ -741,6 +741,7 @@ static struct edma_soc_info dm365_edma_info[] = {
.n_cc = 1,
.queue_tc_mapping = dm365_queue_tc_mapping,
.queue_priority_mapping = dm365_queue_priority_mapping,
.default_queue = EVENTQ_2,
},
};

7
arch/arm/mach-davinci/dma.c
View file

@ -225,6 +225,7 @@ struct edma {
unsigned num_slots;
unsigned num_tc;
unsigned num_cc;
enum dma_event_q default_queue;
/* list of channels with no even trigger; terminated by "-1" */
const s8 *noevent;
@ -267,7 +268,7 @@ static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
/* default to low priority queue */
if (queue_no == EVENTQ_DEFAULT)
queue_no = EVENTQ_1;
queue_no = edma_info[ctlr]->default_queue;
queue_no &= 7;
edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3),
@ -1249,6 +1250,10 @@ static int __init edma_probe(struct platform_device *pdev)
edma_info[j]->num_cc = min_t(unsigned, info[j].n_cc,
EDMA_MAX_CC);
edma_info[j]->default_queue = info[j].default_queue;
if (!edma_info[j]->default_queue)
edma_info[j]->default_queue = EVENTQ_1;
dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
edmacc_regs_base[j]);

1
arch/arm/mach-davinci/include/mach/edma.h
View file

@ -271,6 +271,7 @@ struct edma_soc_info {
unsigned n_slot;
unsigned n_tc;
unsigned n_cc;
enum dma_event_q default_queue;
/* list of channels with no even trigger; terminated by "-1" */
const s8 *noevent;