ARM: shmobile: sh7372: sh7372_fsidivX_clk become non-global
Not only sh7372 but also many Renesas chip has FSI-DIV clock, and we can share its sh_clk_ops. To support common FSI-DIV clock, sh7372_fsidivX_clk becomes non-global by this patch. This is preparation for FSI DT support. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
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4 changed files with 8 additions and 8 deletions
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@ -728,7 +728,7 @@ static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
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static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
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{
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struct clk *fsib_clk;
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struct clk *fdiv_clk = &sh7372_fsidivb_clk;
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struct clk *fdiv_clk = clk_get(NULL, "fsidivb");
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long fsib_rate = 0;
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long fdiv_rate = 0;
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int ackmd_bpfmd;
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@ -882,7 +882,7 @@ static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
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static int fsi_b_set_rate(struct device *dev, int rate, int enable)
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{
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struct clk *fsib_clk;
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struct clk *fdiv_clk = &sh7372_fsidivb_clk;
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struct clk *fdiv_clk = clk_get(NULL, "fsidivb");
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long fsib_rate = 0;
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long fdiv_rate = 0;
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int ackmd_bpfmd;
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@ -481,7 +481,7 @@ static struct clk_mapping fsidiva_clk_mapping = {
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.len = 8,
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};
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struct clk sh7372_fsidiva_clk = {
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static struct clk fsidiva_clk = {
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.ops = &fsidiv_clk_ops,
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.parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
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.mapping = &fsidiva_clk_mapping,
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@ -492,15 +492,15 @@ static struct clk_mapping fsidivb_clk_mapping = {
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.len = 8,
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};
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struct clk sh7372_fsidivb_clk = {
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static struct clk fsidivb_clk = {
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.ops = &fsidiv_clk_ops,
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.parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
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.mapping = &fsidivb_clk_mapping,
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};
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static struct clk *late_main_clks[] = {
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&sh7372_fsidiva_clk,
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&sh7372_fsidivb_clk,
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&fsidiva_clk,
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&fsidivb_clk,
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};
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enum { MSTP001, MSTP000,
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@ -583,6 +583,8 @@ static struct clk_lookup lookups[] = {
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CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
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CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
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CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
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CLKDEV_CON_ID("fsidiva", &fsidiva_clk),
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CLKDEV_CON_ID("fsidivb", &fsidivb_clk),
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/* DIV4 clocks */
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CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
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@ -479,8 +479,6 @@ extern struct clk sh7372_dv_clki_div2_clk;
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extern struct clk sh7372_pllc2_clk;
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extern struct clk sh7372_fsiack_clk;
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extern struct clk sh7372_fsibck_clk;
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extern struct clk sh7372_fsidiva_clk;
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extern struct clk sh7372_fsidivb_clk;
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extern void sh7372_intcs_suspend(void);
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extern void sh7372_intcs_resume(void);
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