arm64: KVM: pmu: Fix AArch32 cycle counter access
We're missing the handling code for the cycle counter accessed from a 32bit guest, leading to unexpected results. Cc: stable@vger.kernel.org # 4.6+ Signed-off-by: Wei Huang <wei@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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1 changed files with 8 additions and 2 deletions
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@ -597,8 +597,14 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu,
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idx = ARMV8_PMU_CYCLE_IDX;
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} else {
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BUG();
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return false;
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}
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} else if (r->CRn == 0 && r->CRm == 9) {
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/* PMCCNTR */
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if (pmu_access_event_counter_el0_disabled(vcpu))
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return false;
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idx = ARMV8_PMU_CYCLE_IDX;
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} else if (r->CRn == 14 && (r->CRm & 12) == 8) {
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/* PMEVCNTRn_EL0 */
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if (pmu_access_event_counter_el0_disabled(vcpu))
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@ -606,7 +612,7 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu,
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idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);
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} else {
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BUG();
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return false;
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}
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if (!pmu_counter_idx_valid(vcpu, idx))
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