drm/i915: Record batch buffer following GPU error
In order to improve our diagnostic capabilities following a GPU hang and subsequent reset, we need to record the batch buffer that triggered the error. We assume that the current batch buffer, plus a few details about what else is on the active list, will be sufficient -- at the very least an improvement over nothing. The extra information is stored in /debug/dri/.../i915_error_state following an error, and may be decoded using intel_gpu_tools/tools/intel_error_decode. v2: Avoid excessive work under spinlocks. v3: Include ringbuffer for later analysis. v4: Use kunmap correctly and record more buffer state. v5: Search ringbuffer for current batch buffer v6: Use a work fn for the impossible IRQ error case. v7: Avoid non-atomic paths whilst in IRQ context. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Chris Wilson
Eric Anholt
parent
7b9c5abee9
commit
9df30794f6
5 changed files with 326 additions and 7 deletions
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@ -350,6 +350,36 @@ static int i915_ringbuffer_info(struct seq_file *m, void *data)
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return 0;
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}
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static const char *pin_flag(int pinned)
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{
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if (pinned > 0)
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return " P";
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else if (pinned < 0)
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return " p";
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else
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return "";
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}
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static const char *tiling_flag(int tiling)
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{
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switch (tiling) {
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default:
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case I915_TILING_NONE: return "";
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case I915_TILING_X: return " X";
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case I915_TILING_Y: return " Y";
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}
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}
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static const char *dirty_flag(int dirty)
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{
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return dirty ? " dirty" : "";
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}
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static const char *purgeable_flag(int purgeable)
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{
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return purgeable ? " purgeable" : "";
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}
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static int i915_error_state(struct seq_file *m, void *unused)
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{
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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@ -357,6 +387,7 @@ static int i915_error_state(struct seq_file *m, void *unused)
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_error_state *error;
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unsigned long flags;
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int i, page, offset, elt;
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spin_lock_irqsave(&dev_priv->error_lock, flags);
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if (!dev_priv->first_error) {
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@ -368,6 +399,7 @@ static int i915_error_state(struct seq_file *m, void *unused)
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seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
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error->time.tv_usec);
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seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
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seq_printf(m, "EIR: 0x%08x\n", error->eir);
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seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
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seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
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@ -379,6 +411,59 @@ static int i915_error_state(struct seq_file *m, void *unused)
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seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
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seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
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}
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seq_printf(m, "seqno: 0x%08x\n", error->seqno);
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if (error->active_bo_count) {
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seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
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for (i = 0; i < error->active_bo_count; i++) {
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seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
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error->active_bo[i].gtt_offset,
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error->active_bo[i].size,
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error->active_bo[i].read_domains,
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error->active_bo[i].write_domain,
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error->active_bo[i].seqno,
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pin_flag(error->active_bo[i].pinned),
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tiling_flag(error->active_bo[i].tiling),
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dirty_flag(error->active_bo[i].dirty),
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purgeable_flag(error->active_bo[i].purgeable));
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if (error->active_bo[i].name)
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seq_printf(m, " (name: %d)", error->active_bo[i].name);
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if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
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seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
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seq_printf(m, "\n");
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}
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}
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for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
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if (error->batchbuffer[i]) {
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struct drm_i915_error_object *obj = error->batchbuffer[i];
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seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
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offset = 0;
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for (page = 0; page < obj->page_count; page++) {
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for (elt = 0; elt < PAGE_SIZE/4; elt++) {
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seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
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offset += 4;
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}
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}
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}
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}
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if (error->ringbuffer) {
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struct drm_i915_error_object *obj = error->ringbuffer;
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seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
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offset = 0;
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for (page = 0; page < obj->page_count; page++) {
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for (elt = 0; elt < PAGE_SIZE/4; elt++) {
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seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
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offset += 4;
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}
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}
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}
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out:
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spin_unlock_irqrestore(&dev_priv->error_lock, flags);
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@ -1644,6 +1644,8 @@ int i915_driver_unload(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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i915_destroy_error_state(dev);
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destroy_workqueue(dev_priv->wq);
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del_timer_sync(&dev_priv->hangcheck_timer);
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@ -150,7 +150,27 @@ struct drm_i915_error_state {
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u32 instps;
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u32 instdone1;
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u32 seqno;
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u64 bbaddr;
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struct timeval time;
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struct drm_i915_error_object {
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int page_count;
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u32 gtt_offset;
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u32 *pages[0];
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} *ringbuffer, *batchbuffer[2];
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struct drm_i915_error_buffer {
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size_t size;
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u32 name;
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u32 seqno;
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u32 gtt_offset;
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u32 read_domains;
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u32 write_domain;
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u32 fence_reg;
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s32 pinned:2;
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u32 tiling:2;
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u32 dirty:1;
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u32 purgeable:1;
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} *active_bo;
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u32 active_bo_count;
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};
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struct drm_i915_display_funcs {
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@ -778,6 +798,7 @@ extern int i965_reset(struct drm_device *dev, u8 flags);
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/* i915_irq.c */
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void i915_hangcheck_elapsed(unsigned long data);
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void i915_destroy_error_state(struct drm_device *dev);
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extern int i915_irq_emit(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern int i915_irq_wait(struct drm_device *dev, void *data,
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@ -432,6 +432,121 @@ static void i915_error_work_func(struct work_struct *work)
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}
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}
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static struct drm_i915_error_object *
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i915_error_object_create(struct drm_device *dev,
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struct drm_gem_object *src)
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{
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struct drm_i915_error_object *dst;
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struct drm_i915_gem_object *src_priv;
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int page, page_count;
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if (src == NULL)
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return NULL;
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src_priv = src->driver_private;
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if (src_priv->pages == NULL)
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return NULL;
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page_count = src->size / PAGE_SIZE;
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dst = kmalloc(sizeof(*dst) + page_count * sizeof (u32 *), GFP_ATOMIC);
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if (dst == NULL)
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return NULL;
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for (page = 0; page < page_count; page++) {
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void *s, *d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
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if (d == NULL)
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goto unwind;
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s = kmap_atomic(src_priv->pages[page], KM_USER0);
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memcpy(d, s, PAGE_SIZE);
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kunmap_atomic(s, KM_USER0);
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dst->pages[page] = d;
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}
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dst->page_count = page_count;
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dst->gtt_offset = src_priv->gtt_offset;
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return dst;
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unwind:
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while (page--)
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kfree(dst->pages[page]);
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kfree(dst);
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return NULL;
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}
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static void
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i915_error_object_free(struct drm_i915_error_object *obj)
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{
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int page;
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if (obj == NULL)
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return;
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for (page = 0; page < obj->page_count; page++)
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kfree(obj->pages[page]);
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kfree(obj);
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}
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static void
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i915_error_state_free(struct drm_device *dev,
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struct drm_i915_error_state *error)
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{
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i915_error_object_free(error->batchbuffer[0]);
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i915_error_object_free(error->batchbuffer[1]);
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i915_error_object_free(error->ringbuffer);
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kfree(error->active_bo);
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kfree(error);
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}
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static u32
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i915_get_bbaddr(struct drm_device *dev, u32 *ring)
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{
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u32 cmd;
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if (IS_I830(dev) || IS_845G(dev))
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cmd = MI_BATCH_BUFFER;
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else if (IS_I965G(dev))
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cmd = (MI_BATCH_BUFFER_START | (2 << 6) |
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MI_BATCH_NON_SECURE_I965);
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else
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cmd = (MI_BATCH_BUFFER_START | (2 << 6));
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return ring[0] == cmd ? ring[1] : 0;
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}
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static u32
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i915_ringbuffer_last_batch(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 head, bbaddr;
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u32 *ring;
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/* Locate the current position in the ringbuffer and walk back
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* to find the most recently dispatched batch buffer.
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*/
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bbaddr = 0;
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head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
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ring = (u32 *)(dev_priv->ring.virtual_start + head);
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while (--ring >= (u32 *)dev_priv->ring.virtual_start) {
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bbaddr = i915_get_bbaddr(dev, ring);
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if (bbaddr)
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break;
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}
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if (bbaddr == 0) {
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ring = (u32 *)(dev_priv->ring.virtual_start + dev_priv->ring.Size);
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while (--ring >= (u32 *)dev_priv->ring.virtual_start) {
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bbaddr = i915_get_bbaddr(dev, ring);
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if (bbaddr)
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break;
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}
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}
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return bbaddr;
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}
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/**
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* i915_capture_error_state - capture an error record for later analysis
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* @dev: drm device
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@ -444,19 +559,26 @@ static void i915_error_work_func(struct work_struct *work)
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static void i915_capture_error_state(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_gem_object *obj_priv;
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struct drm_i915_error_state *error;
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struct drm_gem_object *batchbuffer[2];
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unsigned long flags;
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u32 bbaddr;
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int count;
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spin_lock_irqsave(&dev_priv->error_lock, flags);
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if (dev_priv->first_error)
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goto out;
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error = dev_priv->first_error;
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spin_unlock_irqrestore(&dev_priv->error_lock, flags);
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if (error)
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return;
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error = kmalloc(sizeof(*error), GFP_ATOMIC);
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if (!error) {
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DRM_DEBUG_DRIVER("out ot memory, not capturing error state\n");
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goto out;
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DRM_DEBUG_DRIVER("out of memory, not capturing error state\n");
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return;
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}
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error->seqno = i915_get_gem_seqno(dev);
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error->eir = I915_READ(EIR);
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error->pgtbl_er = I915_READ(PGTBL_ER);
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error->pipeastat = I915_READ(PIPEASTAT);
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@ -467,6 +589,7 @@ static void i915_capture_error_state(struct drm_device *dev)
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error->ipehr = I915_READ(IPEHR);
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error->instdone = I915_READ(INSTDONE);
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error->acthd = I915_READ(ACTHD);
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error->bbaddr = 0;
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} else {
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error->ipeir = I915_READ(IPEIR_I965);
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error->ipehr = I915_READ(IPEHR_I965);
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@ -474,14 +597,101 @@ static void i915_capture_error_state(struct drm_device *dev)
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error->instps = I915_READ(INSTPS);
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error->instdone1 = I915_READ(INSTDONE1);
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error->acthd = I915_READ(ACTHD_I965);
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error->bbaddr = I915_READ64(BB_ADDR);
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}
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bbaddr = i915_ringbuffer_last_batch(dev);
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/* Grab the current batchbuffer, most likely to have crashed. */
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batchbuffer[0] = NULL;
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batchbuffer[1] = NULL;
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count = 0;
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list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
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struct drm_gem_object *obj = obj_priv->obj;
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if (batchbuffer[0] == NULL &&
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bbaddr >= obj_priv->gtt_offset &&
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bbaddr < obj_priv->gtt_offset + obj->size)
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batchbuffer[0] = obj;
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if (batchbuffer[1] == NULL &&
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error->acthd >= obj_priv->gtt_offset &&
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error->acthd < obj_priv->gtt_offset + obj->size &&
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batchbuffer[0] != obj)
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batchbuffer[1] = obj;
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count++;
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}
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/* We need to copy these to an anonymous buffer as the simplest
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* method to avoid being overwritten by userpace.
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*/
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error->batchbuffer[0] = i915_error_object_create(dev, batchbuffer[0]);
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error->batchbuffer[1] = i915_error_object_create(dev, batchbuffer[1]);
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/* Record the ringbuffer */
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error->ringbuffer = i915_error_object_create(dev, dev_priv->ring.ring_obj);
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/* Record buffers on the active list. */
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error->active_bo = NULL;
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error->active_bo_count = 0;
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if (count)
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error->active_bo = kmalloc(sizeof(*error->active_bo)*count,
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GFP_ATOMIC);
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if (error->active_bo) {
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int i = 0;
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list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
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struct drm_gem_object *obj = obj_priv->obj;
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error->active_bo[i].size = obj->size;
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error->active_bo[i].name = obj->name;
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error->active_bo[i].seqno = obj_priv->last_rendering_seqno;
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error->active_bo[i].gtt_offset = obj_priv->gtt_offset;
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error->active_bo[i].read_domains = obj->read_domains;
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error->active_bo[i].write_domain = obj->write_domain;
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error->active_bo[i].fence_reg = obj_priv->fence_reg;
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error->active_bo[i].pinned = 0;
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if (obj_priv->pin_count > 0)
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error->active_bo[i].pinned = 1;
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if (obj_priv->user_pin_count > 0)
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error->active_bo[i].pinned = -1;
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error->active_bo[i].tiling = obj_priv->tiling_mode;
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error->active_bo[i].dirty = obj_priv->dirty;
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error->active_bo[i].purgeable = obj_priv->madv != I915_MADV_WILLNEED;
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if (++i == count)
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break;
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}
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error->active_bo_count = i;
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}
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do_gettimeofday(&error->time);
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dev_priv->first_error = error;
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out:
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spin_lock_irqsave(&dev_priv->error_lock, flags);
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if (dev_priv->first_error == NULL) {
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dev_priv->first_error = error;
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error = NULL;
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}
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spin_unlock_irqrestore(&dev_priv->error_lock, flags);
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if (error)
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i915_error_state_free(dev, error);
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}
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void i915_destroy_error_state(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_error_state *error;
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spin_lock(&dev_priv->error_lock);
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error = dev_priv->first_error;
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dev_priv->first_error = NULL;
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spin_unlock(&dev_priv->error_lock);
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if (error)
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i915_error_state_free(dev, error);
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}
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/**
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@ -328,6 +328,7 @@
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#define CM0_COLOR_EVICT_DISABLE (1<<3)
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#define CM0_DEPTH_WRITE_DISABLE (1<<1)
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#define CM0_RC_OP_FLUSH_DISABLE (1<<0)
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#define BB_ADDR 0x02140 /* 8 bytes */
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#define GFX_FLSH_CNTL 0x02170 /* 915+ only */
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