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Merge "msm: pcie: add support for varying PCIe PHY status bit"

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qctecmdr Service 2019-03-26 07:48:58 -07:00 committed by Gerrit - the friendly Code Review server
commit 9dc403c382
2 changed files with 16 additions and 1 deletions
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6
Documentation/devicetree/bindings/pci/pci-msm.txt
View file

@ -310,6 +310,11 @@ Main node
Value type: <u32>
Definition: Offset from PCIe PHY base to check if PCIe PHY status
- qcom,phy-status-bit:
Usage: required
Value type: <u32>
Definition: BIT to check PCIe PHY status
- qcom,phy-power-down-offset:
Usage: required
Value type: <u32>
@ -468,6 +473,7 @@ Example
qcom,pcie-phy-ver = <0x2101>; /* v2 version 1.01 */
qcom,phy-status-offset = <0x814>;
qcom,phy-status-bit = <6>;
qcom,phy-power-down-offset = <0x840>;
qcom,phy-sequence = <0x0840 0x03 0x0
0x0094 0x08 0x0

11
drivers/pci/controller/pci-msm.c
View file

@ -551,6 +551,7 @@ struct msm_pcie_dev_t {
uint32_t wr_halt_size;
uint32_t slv_addr_space_size;
uint32_t phy_status_offset;
uint32_t phy_status_bit;
uint32_t phy_power_down_offset;
uint32_t cpl_timeout;
uint32_t current_bdf;
@ -1197,6 +1198,8 @@ static void msm_pcie_show_status(struct msm_pcie_dev_t *dev)
dev->slv_addr_space_size);
PCIE_DBG_FS(dev, "phy_status_offset: 0x%x\n",
dev->phy_status_offset);
PCIE_DBG_FS(dev, "phy_status_bit: %u\n",
dev->phy_status_bit);
PCIE_DBG_FS(dev, "phy_power_down_offset: 0x%x\n",
dev->phy_power_down_offset);
PCIE_DBG_FS(dev, "cpl_timeout: 0x%x\n",
@ -3217,7 +3220,8 @@ static bool pcie_phy_is_ready(struct msm_pcie_dev_t *dev)
if (dev->rumi)
return true;
if (readl_relaxed(dev->phy + dev->phy_status_offset) & BIT(6))
if (readl_relaxed(dev->phy + dev->phy_status_offset) &
BIT(dev->phy_status_bit))
return false;
else
return true;
@ -5717,6 +5721,11 @@ static int msm_pcie_probe(struct platform_device *pdev)
PCIE_DBG(pcie_dev, "RC%d: phy-status-offset: 0x%x.\n", pcie_dev->rc_idx,
pcie_dev->phy_status_offset);
of_property_read_u32(pdev->dev.of_node, "qcom,phy-status-bit",
&pcie_dev->phy_status_bit);
PCIE_DBG(pcie_dev, "RC%d: phy-status-bit: %u.\n", pcie_dev->rc_idx,
pcie_dev->phy_status_bit);
of_property_read_u32(of_node, "qcom,phy-power-down-offset",
&pcie_dev->phy_power_down_offset);
PCIE_DBG(pcie_dev, "RC%d: phy-power-down-offset: 0x%x.\n",