MIPS: kernel: unaligned: Add EVA instruction wrappers
Use the load/store instruction wrappers from asm/asm.h to perform such operations when operating in EVA mode. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
This commit is contained in:
Markos Chandras
Ralf Baechle
parent
e3a9b07a9c
commit
9d8e573683
1 changed files with 25 additions and 24 deletions
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@ -7,6 +7,7 @@
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*
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* Copyright (C) 1996, 1998, 1999, 2002 by Ralf Baechle
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* Copyright (C) 1999 Silicon Graphics, Inc.
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* Copyright (C) 2014 Imagination Technologies Ltd.
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*
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* This file contains exception handler for address error exception with the
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* special capability to execute faulting instructions in software. The
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@ -110,8 +111,8 @@ extern void show_registers(struct pt_regs *regs);
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#ifdef __BIG_ENDIAN
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#define LoadHW(addr, value, res) \
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__asm__ __volatile__ (".set\tnoat\n" \
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"1:\tlb\t%0, 0(%2)\n" \
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"2:\tlbu\t$1, 1(%2)\n\t" \
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"1:\t"user_lb("%0", "0(%2)")"\n" \
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"2:\t"user_lbu("$1", "1(%2)")"\n\t" \
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"sll\t%0, 0x8\n\t" \
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"or\t%0, $1\n\t" \
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"li\t%1, 0\n" \
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@ -130,8 +131,8 @@ extern void show_registers(struct pt_regs *regs);
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#define LoadW(addr, value, res) \
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__asm__ __volatile__ ( \
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"1:\tlwl\t%0, (%2)\n" \
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"2:\tlwr\t%0, 3(%2)\n\t" \
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"1:\t"user_lwl("%0", "(%2)")"\n" \
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"2:\t"user_lwr("%0", "3(%2)")"\n\t" \
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"li\t%1, 0\n" \
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"3:\n\t" \
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".insn\n\t" \
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@ -149,8 +150,8 @@ extern void show_registers(struct pt_regs *regs);
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#define LoadHWU(addr, value, res) \
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__asm__ __volatile__ ( \
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".set\tnoat\n" \
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"1:\tlbu\t%0, 0(%2)\n" \
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"2:\tlbu\t$1, 1(%2)\n\t" \
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"1:\t"user_lbu("%0", "0(%2)")"\n" \
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"2:\t"user_lbu("$1", "1(%2)")"\n\t" \
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"sll\t%0, 0x8\n\t" \
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"or\t%0, $1\n\t" \
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"li\t%1, 0\n" \
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@ -170,8 +171,8 @@ extern void show_registers(struct pt_regs *regs);
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#define LoadWU(addr, value, res) \
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__asm__ __volatile__ ( \
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"1:\tlwl\t%0, (%2)\n" \
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"2:\tlwr\t%0, 3(%2)\n\t" \
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"1:\t"user_lwl("%0", "(%2)")"\n" \
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"2:\t"user_lwr("%0", "3(%2)")"\n\t" \
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"dsll\t%0, %0, 32\n\t" \
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"dsrl\t%0, %0, 32\n\t" \
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"li\t%1, 0\n" \
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@ -209,9 +210,9 @@ extern void show_registers(struct pt_regs *regs);
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#define StoreHW(addr, value, res) \
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__asm__ __volatile__ ( \
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".set\tnoat\n" \
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"1:\tsb\t%1, 1(%2)\n\t" \
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"1:\t"user_sb("%1", "1(%2)")"\n" \
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"srl\t$1, %1, 0x8\n" \
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"2:\tsb\t$1, 0(%2)\n\t" \
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"2:\t"user_sb("$1", "0(%2)")"\n" \
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".set\tat\n\t" \
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"li\t%0, 0\n" \
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"3:\n\t" \
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@ -229,8 +230,8 @@ extern void show_registers(struct pt_regs *regs);
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#define StoreW(addr, value, res) \
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__asm__ __volatile__ ( \
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"1:\tswl\t%1,(%2)\n" \
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"2:\tswr\t%1, 3(%2)\n\t" \
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"1:\t"user_swl("%1", "(%2)")"\n" \
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"2:\t"user_swr("%1", "3(%2)")"\n\t" \
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"li\t%0, 0\n" \
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"3:\n\t" \
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".insn\n\t" \
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@ -267,8 +268,8 @@ extern void show_registers(struct pt_regs *regs);
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#ifdef __LITTLE_ENDIAN
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#define LoadHW(addr, value, res) \
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__asm__ __volatile__ (".set\tnoat\n" \
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"1:\tlb\t%0, 1(%2)\n" \
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"2:\tlbu\t$1, 0(%2)\n\t" \
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"1:\t"user_lb("%0", "1(%2)")"\n" \
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"2:\t"user_lbu("$1", "0(%2)")"\n\t" \
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"sll\t%0, 0x8\n\t" \
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"or\t%0, $1\n\t" \
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"li\t%1, 0\n" \
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@ -287,8 +288,8 @@ extern void show_registers(struct pt_regs *regs);
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#define LoadW(addr, value, res) \
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__asm__ __volatile__ ( \
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"1:\tlwl\t%0, 3(%2)\n" \
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"2:\tlwr\t%0, (%2)\n\t" \
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"1:\t"user_lwl("%0", "3(%2)")"\n" \
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"2:\t"user_lwr("%0", "(%2)")"\n\t" \
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"li\t%1, 0\n" \
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"3:\n\t" \
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".insn\n\t" \
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@ -306,8 +307,8 @@ extern void show_registers(struct pt_regs *regs);
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#define LoadHWU(addr, value, res) \
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__asm__ __volatile__ ( \
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".set\tnoat\n" \
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"1:\tlbu\t%0, 1(%2)\n" \
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"2:\tlbu\t$1, 0(%2)\n\t" \
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"1:\t"user_lbu("%0", "1(%2)")"\n" \
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"2:\t"user_lbu("$1", "0(%2)")"\n\t" \
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"sll\t%0, 0x8\n\t" \
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"or\t%0, $1\n\t" \
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"li\t%1, 0\n" \
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@ -327,8 +328,8 @@ extern void show_registers(struct pt_regs *regs);
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#define LoadWU(addr, value, res) \
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__asm__ __volatile__ ( \
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"1:\tlwl\t%0, 3(%2)\n" \
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"2:\tlwr\t%0, (%2)\n\t" \
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"1:\t"user_lwl("%0", "3(%2)")"\n" \
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"2:\t"user_lwr("%0", "(%2)")"\n\t" \
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"dsll\t%0, %0, 32\n\t" \
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"dsrl\t%0, %0, 32\n\t" \
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"li\t%1, 0\n" \
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@ -366,9 +367,9 @@ extern void show_registers(struct pt_regs *regs);
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#define StoreHW(addr, value, res) \
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__asm__ __volatile__ ( \
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".set\tnoat\n" \
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"1:\tsb\t%1, 0(%2)\n\t" \
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"1:\t"user_sb("%1", "0(%2)")"\n" \
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"srl\t$1,%1, 0x8\n" \
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"2:\tsb\t$1, 1(%2)\n\t" \
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"2:\t"user_sb("$1", "1(%2)")"\n" \
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".set\tat\n\t" \
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"li\t%0, 0\n" \
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"3:\n\t" \
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@ -386,8 +387,8 @@ extern void show_registers(struct pt_regs *regs);
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#define StoreW(addr, value, res) \
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__asm__ __volatile__ ( \
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"1:\tswl\t%1, 3(%2)\n" \
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"2:\tswr\t%1, (%2)\n\t" \
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"1:\t"user_swl("%1", "3(%2)")"\n" \
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"2:\t"user_swr("%1", "(%2)")"\n\t" \
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"li\t%0, 0\n" \
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"3:\n\t" \
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".insn\n\t" \
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