[MTD NAND] Update CS553x NAND driver: Hardware ECC support, optimisations.
- Implement HW ECC support, - Provide read_buf() and write_buf() routines using memcpy - Use on-flash bad block table - Fix module refcounting - Avoid read/modify/write in hwcontrol() - Minor cosmetic fixes Partly based on code and ideas from Tom Sylla <tom.sylla@amd.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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1 changed files with 75 additions and 27 deletions
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@ -4,6 +4,7 @@
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* (C) 2005, 2006 Red Hat Inc.
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*
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* Author: David Woodhouse <dwmw2@infradead.org>
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* Tom Sylla <tom.sylla@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -22,6 +23,7 @@
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#include <linux/pci.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <asm/msr.h>
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@ -87,11 +89,34 @@
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#define CS_NAND_ECC_CLRECC (1<<1)
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#define CS_NAND_ECC_ENECC (1<<0)
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static void cs553x_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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{
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struct nand_chip *this = mtd->priv;
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while (unlikely(len > 0x800)) {
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memcpy_fromio(buf, this->IO_ADDR_R, 0x800);
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buf += 0x800;
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len -= 0x800;
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}
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memcpy_fromio(buf, this->IO_ADDR_R, len);
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}
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static void cs553x_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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struct nand_chip *this = mtd->priv;
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while (unlikely(len > 0x800)) {
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memcpy_toio(this->IO_ADDR_R, buf, 0x800);
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buf += 0x800;
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len -= 0x800;
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}
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memcpy_toio(this->IO_ADDR_R, buf, len);
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}
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static unsigned char cs553x_read_byte(struct mtd_info *mtd)
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{
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struct nand_chip *this = mtd->priv;
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unsigned char foo = readb(this->IO_ADDR_R);
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return foo;
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return readb(this->IO_ADDR_R);
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}
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static void cs553x_write_byte(struct mtd_info *mtd, u_char byte)
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@ -110,35 +135,29 @@ static void cs553x_hwcontrol(struct mtd_info *mtd, int cmd)
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{
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struct nand_chip *this = mtd->priv;
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void __iomem *mmio_base = this->IO_ADDR_R;
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uint8_t old = readb(mmio_base + MM_NAND_CTL);
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unsigned char ctl;
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switch(cmd) {
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case NAND_CTL_SETCLE:
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old |= CS_NAND_CTL_CLE;
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ctl = CS_NAND_CTL_CLE;
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break;
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case NAND_CTL_CLRCLE:
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old &= ~CS_NAND_CTL_CLE;
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case NAND_CTL_CLRALE:
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case NAND_CTL_SETNCE:
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ctl = 0;
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break;
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case NAND_CTL_SETALE:
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old |= CS_NAND_CTL_ALE;
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break;
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case NAND_CTL_CLRALE:
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old &= ~CS_NAND_CTL_ALE;
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break;
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case NAND_CTL_SETNCE:
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old &= ~CS_NAND_CTL_CE;
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ctl = CS_NAND_CTL_ALE;
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break;
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default:
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case NAND_CTL_CLRNCE:
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old |= CS_NAND_CTL_CE;
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ctl = CS_NAND_CTL_CE;
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break;
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}
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writeb(old, mmio_base + MM_NAND_CTL);
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writeb(ctl, mmio_base + MM_NAND_CTL);
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}
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@ -151,6 +170,29 @@ static int cs553x_device_ready(struct mtd_info *mtd)
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return (foo & CS_NAND_STS_FLASH_RDY) && !(foo & CS_NAND_CTLR_BUSY);
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}
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static void cs_enable_hwecc(struct mtd_info *mtd, int mode)
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{
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struct nand_chip *this = mtd->priv;
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void __iomem *mmio_base = this->IO_ADDR_R;
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writeb(0x07, mmio_base + MM_NAND_ECC_CTL);
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}
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static int cs_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
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{
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uint32_t ecc;
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struct nand_chip *this = mtd->priv;
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void __iomem *mmio_base = this->IO_ADDR_R;
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ecc = readl(mmio_base + MM_NAND_STS);
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ecc_code[1] = ecc >> 8;
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ecc_code[0] = ecc >> 16;
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ecc_code[2] = ecc >> 24;
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return 0;
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}
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static struct mtd_info *cs553x_mtd[4];
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static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
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@ -178,8 +220,8 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
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this = (struct nand_chip *) (&new_mtd[1]);
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/* Initialize structures */
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memset((char *) new_mtd, 0, sizeof(struct mtd_info));
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memset((char *) this, 0, sizeof(struct nand_chip));
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memset(new_mtd, 0, sizeof(struct mtd_info));
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memset(this, 0, sizeof(struct nand_chip));
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/* Link the private data with the MTD structure */
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new_mtd->priv = this;
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@ -196,13 +238,18 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
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this->dev_ready = cs553x_device_ready;
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this->read_byte = cs553x_read_byte;
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this->write_byte = cs553x_write_byte;
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this->read_buf = cs553x_read_buf;
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this->write_buf = cs553x_write_buf;
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/* 20 us command delay time */
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this->chip_delay = 20;
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this->eccmode = NAND_ECC_SOFT;
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this->chip_delay = 0;
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this->eccmode = NAND_ECC_HW3_256;
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this->enable_hwecc = cs_enable_hwecc;
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this->calculate_ecc = cs_calculate_ecc;
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this->correct_data = nand_correct_data;
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/* Enable the following for a flash based bad block table */
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// this->options = NAND_USE_FLASH_BBT;
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this->options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR;
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/* Scan to find existance of the device */
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if (nand_scan(new_mtd, 1)) {
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@ -210,6 +257,7 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
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goto out_ior;
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}
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new_mtd->owner = THIS_MODULE;
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cs553x_mtd[cs] = new_mtd;
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goto out;
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