x86: unify interrupt vector defines
The interrupt vector defines are copied 4 times around with minimal differences. Move them all into asm-x86/irq_vectors.h Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Thomas Gleixner
Ingo Molnar
parent
2e0884362d
commit
9b7dc567d0
12 changed files with 184 additions and 359 deletions
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@ -51,7 +51,7 @@
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#include <asm/percpu.h>
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#include <asm/percpu.h>
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#include <asm/dwarf2.h>
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#include <asm/dwarf2.h>
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#include <asm/processor-flags.h>
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#include <asm/processor-flags.h>
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#include "irq_vectors.h"
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#include <asm/irq_vectors.h>
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/*
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/*
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* We use macros for low-level operations which need to be overridden
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* We use macros for low-level operations which need to be overridden
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@ -33,8 +33,7 @@
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#include <asm/apic.h>
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#include <asm/apic.h>
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#include <asm/timer.h>
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#include <asm/timer.h>
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#include <asm/i8253.h>
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#include <asm/i8253.h>
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#include <asm/irq_vectors.h>
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#include <irq_vectors.h>
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#define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
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#define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
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#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
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#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
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@ -21,10 +21,9 @@
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/apic.h>
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#include <asm/apic.h>
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#include <asm/i8259.h>
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#include <asm/i8259.h>
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#include <asm/irq_vectors.h>
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#include "cobalt.h"
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#include "cobalt.h"
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#include "irq_vectors.h"
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static DEFINE_SPINLOCK(cobalt_lock);
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static DEFINE_SPINLOCK(cobalt_lock);
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@ -13,7 +13,7 @@
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* unified by tglx
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* unified by tglx
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*/
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*/
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#define NMI_VECTOR 0x02
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#include <asm/irq_vectors.h>
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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@ -75,6 +75,16 @@ extern void send_IPI(int dest, int vector);
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extern atomic_t irq_err_count;
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extern atomic_t irq_err_count;
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extern atomic_t irq_mis_count;
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extern atomic_t irq_mis_count;
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/* Voyager functions */
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extern asmlinkage void vic_cpi_interrupt(void);
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extern asmlinkage void vic_sys_interrupt(void);
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extern asmlinkage void vic_cmn_interrupt(void);
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extern asmlinkage void qic_timer_interrupt(void);
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extern asmlinkage void qic_invalidate_interrupt(void);
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extern asmlinkage void qic_reschedule_interrupt(void);
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extern asmlinkage void qic_enable_irq_interrupt(void);
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extern asmlinkage void qic_call_function_interrupt(void);
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#endif /* !ASSEMBLY_ */
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#endif /* !ASSEMBLY_ */
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#ifdef CONFIG_X86_32
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#ifdef CONFIG_X86_32
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@ -1,74 +1,3 @@
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/*
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* IDT vectors usable for external interrupt sources start
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* at 0x20:
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*/
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#define FIRST_EXTERNAL_VECTOR 0x20
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#define IA32_SYSCALL_VECTOR 0x80
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/* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
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* cleanup after irq migration.
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*/
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#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
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/*
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* Vectors 0x30-0x3f are used for ISA interrupts.
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*/
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#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
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#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
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#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
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#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
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#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
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#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
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#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
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#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
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#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
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#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
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#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
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#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
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#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
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#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
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#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
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#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
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/*
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* Special IRQ vectors used by the SMP architecture, 0xf0-0xff
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*
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* some of the following vectors are 'rare', they are merged
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* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
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* TLB, reschedule and local APIC vectors are performance-critical.
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*/
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#define SPURIOUS_APIC_VECTOR 0xff
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#define ERROR_APIC_VECTOR 0xfe
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#define RESCHEDULE_VECTOR 0xfd
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#define CALL_FUNCTION_VECTOR 0xfc
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/* fb free - please don't readd KDB here because it's useless
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(hint - think what a NMI bit does to a vector) */
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#define THERMAL_APIC_VECTOR 0xfa
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#define THRESHOLD_APIC_VECTOR 0xf9
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/* f8 free */
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#define INVALIDATE_TLB_VECTOR_END 0xf7
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#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
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#define NUM_INVALIDATE_TLB_VECTORS 8
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/*
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* Local APIC timer IRQ vector is on a different priority level,
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* to work around the 'lost local interrupt if more than 2 IRQ
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* sources per level' errata.
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*/
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#define LOCAL_TIMER_VECTOR 0xef
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/*
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* First APIC vector available to drivers: (vectors 0x30-0xee)
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* we start at 0x41 to spread out vectors evenly between priority
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* levels. (0x80 is the syscall vector)
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*/
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#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
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#define FIRST_SYSTEM_VECTOR 0xef /* duplicated in irq.h */
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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typedef int vector_irq_t[NR_VECTORS];
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typedef int vector_irq_t[NR_VECTORS];
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@ -12,7 +12,7 @@
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#include <linux/sched.h>
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#include <linux/sched.h>
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/* include comes from machine specific directory */
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/* include comes from machine specific directory */
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#include "irq_vectors.h"
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#include <asm/irq_vectors.h>
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#include <asm/thread_info.h>
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#include <asm/thread_info.h>
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static inline int irq_canonicalize(int irq)
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static inline int irq_canonicalize(int irq)
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@ -11,34 +11,7 @@
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*/
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*/
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#include <asm/apicdef.h>
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#include <asm/apicdef.h>
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#include <asm/irq_vectors.h>
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#define TIMER_IRQ 0
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/*
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* 16 8259A IRQ's, 208 potential APIC interrupt sources.
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* Right now the APIC is mostly only used for SMP.
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* 256 vectors is an architectural limit. (we can have
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* more than 256 devices theoretically, but they will
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* have to use shared interrupts)
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* Since vectors 0x00-0x1f are used/reserved for the CPU,
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* the usable vector space is 0x20-0xff (224 vectors)
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*/
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/*
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* The maximum number of vectors supported by x86_64 processors
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* is limited to 256. For processors other than x86_64, NR_VECTORS
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* should be changed accordingly.
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*/
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#define NR_VECTORS 256
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#define FIRST_SYSTEM_VECTOR 0xef /* duplicated in hw_irq.h */
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#if NR_CPUS < MAX_IO_APICS
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#define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
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#else
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#define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
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#endif
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#define NR_IRQ_VECTORS NR_IRQS
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static inline int irq_canonicalize(int irq)
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static inline int irq_canonicalize(int irq)
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{
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{
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168
include/asm-x86/irq_vectors.h
Normal file
168
include/asm-x86/irq_vectors.h
Normal file
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@ -0,0 +1,168 @@
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#ifndef _ASM_IRQ_VECTORS_H
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#define _ASM_IRQ_VECTORS_H
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#include <linux/threads.h>
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#define NMI_VECTOR 0x02
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/*
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* IDT vectors usable for external interrupt sources start
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* at 0x20:
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*/
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#define FIRST_EXTERNAL_VECTOR 0x20
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#ifdef CONFIG_X86_32
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# define SYSCALL_VECTOR 0x80
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#else
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# define IA32_SYSCALL_VECTOR 0x80
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#endif
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/*
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* Vectors 0x20-0x2f are used for ISA interrupts on 32 bit.
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*
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* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
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* cleanup after irq migration on 64 bit.
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*/
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#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
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/*
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* Vectors 0x30-0x3f are used for ISA interrupts on 64 bit
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*/
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#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
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#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
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#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
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#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
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#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
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#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
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#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
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#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
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#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
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#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
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#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
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#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
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#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
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#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
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#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
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#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
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/*
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* Special IRQ vectors used by the SMP architecture, 0xf0-0xff
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*
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* some of the following vectors are 'rare', they are merged
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* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
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* TLB, reschedule and local APIC vectors are performance-critical.
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*
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* Vectors 0xf0-0xfa are free (reserved for future Linux use).
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*/
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#ifdef CONFIG_X86_32
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# define SPURIOUS_APIC_VECTOR 0xff
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# define ERROR_APIC_VECTOR 0xfe
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# define INVALIDATE_TLB_VECTOR 0xfd
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# define RESCHEDULE_VECTOR 0xfc
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# define CALL_FUNCTION_VECTOR 0xfb
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# define THERMAL_APIC_VECTOR 0xf0
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#else
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#define SPURIOUS_APIC_VECTOR 0xff
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#define ERROR_APIC_VECTOR 0xfe
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#define RESCHEDULE_VECTOR 0xfd
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#define CALL_FUNCTION_VECTOR 0xfc
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#define THERMAL_APIC_VECTOR 0xfa
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#define THRESHOLD_APIC_VECTOR 0xf9
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#define INVALIDATE_TLB_VECTOR_END 0xf7
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#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
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#define NUM_INVALIDATE_TLB_VECTORS 8
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#endif
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/*
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* Local APIC timer IRQ vector is on a different priority level,
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* to work around the 'lost local interrupt if more than 2 IRQ
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* sources per level' errata.
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*/
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#define LOCAL_TIMER_VECTOR 0xef
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/*
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* First APIC vector available to drivers: (vectors 0x30-0xee) we
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* start at 0x31(0x41) to spread out vectors evenly between priority
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* levels. (0x80 is the syscall vector)
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*/
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#ifdef CONFIG_X86_32
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# define FIRST_DEVICE_VECTOR 0x31
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#else
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# define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
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#endif
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#define FIRST_SYSTEM_VECTOR 0xef
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#define NR_VECTORS 256
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#define FPU_IRQ 13
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#define FIRST_VM86_IRQ 3
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#define LAST_VM86_IRQ 15
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#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
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#if !defined(CONFIG_X86_VISWS) && !defined(CONFIG_X86_VOYAGER)
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# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT)
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# define NR_IRQS 224
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# if (224 >= 32 * NR_CPUS)
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# define NR_IRQ_VECTORS NR_IRQS
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# else
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# define NR_IRQ_VECTORS (32 * NR_CPUS)
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# endif
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# else /* IO_APIC || PARAVIRT */
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# define NR_IRQS 16
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# define NR_IRQ_VECTORS NR_IRQS
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# endif
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#else /* !VISWS && !VOYAGER */
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# define NR_IRQS 224
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# define NR_IRQ_VECTORS NR_IRQS
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#endif /* VISWS */
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/* Voyager specific defines */
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/* These define the CPIs we use in linux */
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#define VIC_CPI_LEVEL0 0
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#define VIC_CPI_LEVEL1 1
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/* now the fake CPIs */
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#define VIC_TIMER_CPI 2
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#define VIC_INVALIDATE_CPI 3
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#define VIC_RESCHEDULE_CPI 4
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#define VIC_ENABLE_IRQ_CPI 5
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#define VIC_CALL_FUNCTION_CPI 6
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/* Now the QIC CPIs: Since we don't need the two initial levels,
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* these are 2 less than the VIC CPIs */
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#define QIC_CPI_OFFSET 1
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#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
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#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
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#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
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#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
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#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
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|
#define VIC_START_FAKE_CPI VIC_TIMER_CPI
|
||||||
|
#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI
|
||||||
|
|
||||||
|
/* this is the SYS_INT CPI. */
|
||||||
|
#define VIC_SYS_INT 8
|
||||||
|
#define VIC_CMN_INT 15
|
||||||
|
|
||||||
|
/* This is the boot CPI for alternate processors. It gets overwritten
|
||||||
|
* by the above once the system has activated all available processors */
|
||||||
|
#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
|
||||||
|
#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* _ASM_IRQ_VECTORS_H */
|
||||||
|
|
@ -1,96 +0,0 @@
|
||||||
/*
|
|
||||||
* This file should contain #defines for all of the interrupt vector
|
|
||||||
* numbers used by this architecture.
|
|
||||||
*
|
|
||||||
* In addition, there are some standard defines:
|
|
||||||
*
|
|
||||||
* FIRST_EXTERNAL_VECTOR:
|
|
||||||
* The first free place for external interrupts
|
|
||||||
*
|
|
||||||
* SYSCALL_VECTOR:
|
|
||||||
* The IRQ vector a syscall makes the user to kernel transition
|
|
||||||
* under.
|
|
||||||
*
|
|
||||||
* TIMER_IRQ:
|
|
||||||
* The IRQ number the timer interrupt comes in at.
|
|
||||||
*
|
|
||||||
* NR_IRQS:
|
|
||||||
* The total number of interrupt vectors (including all the
|
|
||||||
* architecture specific interrupts) needed.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
#ifndef _ASM_IRQ_VECTORS_H
|
|
||||||
#define _ASM_IRQ_VECTORS_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
* IDT vectors usable for external interrupt sources start
|
|
||||||
* at 0x20:
|
|
||||||
*/
|
|
||||||
#define FIRST_EXTERNAL_VECTOR 0x20
|
|
||||||
|
|
||||||
#define SYSCALL_VECTOR 0x80
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Vectors 0x20-0x2f are used for ISA interrupts.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Special IRQ vectors used by the SMP architecture, 0xf0-0xff
|
|
||||||
*
|
|
||||||
* some of the following vectors are 'rare', they are merged
|
|
||||||
* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
|
|
||||||
* TLB, reschedule and local APIC vectors are performance-critical.
|
|
||||||
*
|
|
||||||
* Vectors 0xf0-0xfa are free (reserved for future Linux use).
|
|
||||||
*/
|
|
||||||
#define SPURIOUS_APIC_VECTOR 0xff
|
|
||||||
#define ERROR_APIC_VECTOR 0xfe
|
|
||||||
#define INVALIDATE_TLB_VECTOR 0xfd
|
|
||||||
#define RESCHEDULE_VECTOR 0xfc
|
|
||||||
#define CALL_FUNCTION_VECTOR 0xfb
|
|
||||||
|
|
||||||
#define THERMAL_APIC_VECTOR 0xf0
|
|
||||||
/*
|
|
||||||
* Local APIC timer IRQ vector is on a different priority level,
|
|
||||||
* to work around the 'lost local interrupt if more than 2 IRQ
|
|
||||||
* sources per level' errata.
|
|
||||||
*/
|
|
||||||
#define LOCAL_TIMER_VECTOR 0xef
|
|
||||||
|
|
||||||
/*
|
|
||||||
* First APIC vector available to drivers: (vectors 0x30-0xee)
|
|
||||||
* we start at 0x31 to spread out vectors evenly between priority
|
|
||||||
* levels. (0x80 is the syscall vector)
|
|
||||||
*/
|
|
||||||
#define FIRST_DEVICE_VECTOR 0x31
|
|
||||||
#define FIRST_SYSTEM_VECTOR 0xef
|
|
||||||
|
|
||||||
#define TIMER_IRQ 0
|
|
||||||
|
|
||||||
/*
|
|
||||||
* 16 8259A IRQ's, 208 potential APIC interrupt sources.
|
|
||||||
* Right now the APIC is mostly only used for SMP.
|
|
||||||
* 256 vectors is an architectural limit. (we can have
|
|
||||||
* more than 256 devices theoretically, but they will
|
|
||||||
* have to use shared interrupts)
|
|
||||||
* Since vectors 0x00-0x1f are used/reserved for the CPU,
|
|
||||||
* the usable vector space is 0x20-0xff (224 vectors)
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The maximum number of vectors supported by i386 processors
|
|
||||||
* is limited to 256. For processors other than i386, NR_VECTORS
|
|
||||||
* should be changed accordingly.
|
|
||||||
*/
|
|
||||||
#define NR_VECTORS 256
|
|
||||||
|
|
||||||
#include "irq_vectors_limits.h"
|
|
||||||
|
|
||||||
#define FPU_IRQ 13
|
|
||||||
|
|
||||||
#define FIRST_VM86_IRQ 3
|
|
||||||
#define LAST_VM86_IRQ 15
|
|
||||||
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* _ASM_IRQ_VECTORS_H */
|
|
||||||
|
|
@ -1,16 +0,0 @@
|
||||||
#ifndef _ASM_IRQ_VECTORS_LIMITS_H
|
|
||||||
#define _ASM_IRQ_VECTORS_LIMITS_H
|
|
||||||
|
|
||||||
#if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT)
|
|
||||||
#define NR_IRQS 224
|
|
||||||
# if (224 >= 32 * NR_CPUS)
|
|
||||||
# define NR_IRQ_VECTORS NR_IRQS
|
|
||||||
# else
|
|
||||||
# define NR_IRQ_VECTORS (32 * NR_CPUS)
|
|
||||||
# endif
|
|
||||||
#else
|
|
||||||
#define NR_IRQS 16
|
|
||||||
#define NR_IRQ_VECTORS NR_IRQS
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* _ASM_IRQ_VECTORS_LIMITS_H */
|
|
||||||
|
|
@ -1,62 +0,0 @@
|
||||||
#ifndef _ASM_IRQ_VECTORS_H
|
|
||||||
#define _ASM_IRQ_VECTORS_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
* IDT vectors usable for external interrupt sources start
|
|
||||||
* at 0x20:
|
|
||||||
*/
|
|
||||||
#define FIRST_EXTERNAL_VECTOR 0x20
|
|
||||||
|
|
||||||
#define SYSCALL_VECTOR 0x80
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Vectors 0x20-0x2f are used for ISA interrupts.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Special IRQ vectors used by the SMP architecture, 0xf0-0xff
|
|
||||||
*
|
|
||||||
* some of the following vectors are 'rare', they are merged
|
|
||||||
* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
|
|
||||||
* TLB, reschedule and local APIC vectors are performance-critical.
|
|
||||||
*
|
|
||||||
* Vectors 0xf0-0xfa are free (reserved for future Linux use).
|
|
||||||
*/
|
|
||||||
#define SPURIOUS_APIC_VECTOR 0xff
|
|
||||||
#define ERROR_APIC_VECTOR 0xfe
|
|
||||||
#define INVALIDATE_TLB_VECTOR 0xfd
|
|
||||||
#define RESCHEDULE_VECTOR 0xfc
|
|
||||||
#define CALL_FUNCTION_VECTOR 0xfb
|
|
||||||
|
|
||||||
#define THERMAL_APIC_VECTOR 0xf0
|
|
||||||
/*
|
|
||||||
* Local APIC timer IRQ vector is on a different priority level,
|
|
||||||
* to work around the 'lost local interrupt if more than 2 IRQ
|
|
||||||
* sources per level' errata.
|
|
||||||
*/
|
|
||||||
#define LOCAL_TIMER_VECTOR 0xef
|
|
||||||
|
|
||||||
/*
|
|
||||||
* First APIC vector available to drivers: (vectors 0x30-0xee)
|
|
||||||
* we start at 0x31 to spread out vectors evenly between priority
|
|
||||||
* levels. (0x80 is the syscall vector)
|
|
||||||
*/
|
|
||||||
#define FIRST_DEVICE_VECTOR 0x31
|
|
||||||
#define FIRST_SYSTEM_VECTOR 0xef
|
|
||||||
|
|
||||||
#define TIMER_IRQ 0
|
|
||||||
|
|
||||||
/*
|
|
||||||
* IRQ definitions
|
|
||||||
*/
|
|
||||||
#define NR_VECTORS 256
|
|
||||||
#define NR_IRQS 224
|
|
||||||
#define NR_IRQ_VECTORS NR_IRQS
|
|
||||||
|
|
||||||
#define FPU_IRQ 13
|
|
||||||
|
|
||||||
#define FIRST_VM86_IRQ 3
|
|
||||||
#define LAST_VM86_IRQ 15
|
|
||||||
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
|
|
||||||
|
|
||||||
#endif /* _ASM_IRQ_VECTORS_H */
|
|
||||||
|
|
@ -1,79 +0,0 @@
|
||||||
/* -*- mode: c; c-basic-offset: 8 -*- */
|
|
||||||
|
|
||||||
/* Copyright (C) 2002
|
|
||||||
*
|
|
||||||
* Author: James.Bottomley@HansenPartnership.com
|
|
||||||
*
|
|
||||||
* linux/arch/i386/voyager/irq_vectors.h
|
|
||||||
*
|
|
||||||
* This file provides definitions for the VIC and QIC CPIs
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _ASM_IRQ_VECTORS_H
|
|
||||||
#define _ASM_IRQ_VECTORS_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
* IDT vectors usable for external interrupt sources start
|
|
||||||
* at 0x20:
|
|
||||||
*/
|
|
||||||
#define FIRST_EXTERNAL_VECTOR 0x20
|
|
||||||
|
|
||||||
#define SYSCALL_VECTOR 0x80
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Vectors 0x20-0x2f are used for ISA interrupts.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* These define the CPIs we use in linux */
|
|
||||||
#define VIC_CPI_LEVEL0 0
|
|
||||||
#define VIC_CPI_LEVEL1 1
|
|
||||||
/* now the fake CPIs */
|
|
||||||
#define VIC_TIMER_CPI 2
|
|
||||||
#define VIC_INVALIDATE_CPI 3
|
|
||||||
#define VIC_RESCHEDULE_CPI 4
|
|
||||||
#define VIC_ENABLE_IRQ_CPI 5
|
|
||||||
#define VIC_CALL_FUNCTION_CPI 6
|
|
||||||
|
|
||||||
/* Now the QIC CPIs: Since we don't need the two initial levels,
|
|
||||||
* these are 2 less than the VIC CPIs */
|
|
||||||
#define QIC_CPI_OFFSET 1
|
|
||||||
#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
|
|
||||||
#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
|
|
||||||
#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
|
|
||||||
#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
|
|
||||||
#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
|
|
||||||
|
|
||||||
#define VIC_START_FAKE_CPI VIC_TIMER_CPI
|
|
||||||
#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI
|
|
||||||
|
|
||||||
/* this is the SYS_INT CPI. */
|
|
||||||
#define VIC_SYS_INT 8
|
|
||||||
#define VIC_CMN_INT 15
|
|
||||||
|
|
||||||
/* This is the boot CPI for alternate processors. It gets overwritten
|
|
||||||
* by the above once the system has activated all available processors */
|
|
||||||
#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
|
|
||||||
#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
|
|
||||||
|
|
||||||
#define NR_VECTORS 256
|
|
||||||
#define NR_IRQS 224
|
|
||||||
#define NR_IRQ_VECTORS NR_IRQS
|
|
||||||
|
|
||||||
#define FPU_IRQ 13
|
|
||||||
|
|
||||||
#define FIRST_VM86_IRQ 3
|
|
||||||
#define LAST_VM86_IRQ 15
|
|
||||||
#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
|
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
|
||||||
extern asmlinkage void vic_cpi_interrupt(void);
|
|
||||||
extern asmlinkage void vic_sys_interrupt(void);
|
|
||||||
extern asmlinkage void vic_cmn_interrupt(void);
|
|
||||||
extern asmlinkage void qic_timer_interrupt(void);
|
|
||||||
extern asmlinkage void qic_invalidate_interrupt(void);
|
|
||||||
extern asmlinkage void qic_reschedule_interrupt(void);
|
|
||||||
extern asmlinkage void qic_enable_irq_interrupt(void);
|
|
||||||
extern asmlinkage void qic_call_function_interrupt(void);
|
|
||||||
#endif /* !__ASSEMBLY__ */
|
|
||||||
|
|
||||||
#endif /* _ASM_IRQ_VECTORS_H */
|
|
||||||
Loading…
Reference in a new issue