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ARM: mach-shmobile: Use 0x2200 as INTCS_VECT_BASE

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Change INTCS_VECT_BASE from 0x3400 to 0x2200.

The old value 0x3400 gave the INTCA and INTCS interrupt
conrollers separated spaces, but required ARM support
for more than 512 NR_IRQS which is not in place at this
point.

The value 0x2200 will make some of the INTCA interrupts
make use of empty INTCS areas. This is a bit more error
prone but works fine as a workaround for G3, G3 and AP4.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm 2010-05-19 10:29:47 +00:00 committed by Paul Mundt
parent ffee72d468
commit 9b7c23adb3
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-shmobile/include/mach/irqs.h
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@ -9,7 +9,7 @@
#define irq2evt(irq) (((irq) + 16) << 5)
/* INTCS */
#define INTCS_VECT_BASE 0x3400
#define INTCS_VECT_BASE 0x2200
#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))